DipSwitch
0bb4748a94
core: Fix/refactor function naming in core/incude/irq.h
2016-03-20 16:47:34 +01:00
Hauke Petersen
3f478b6e12
cpu/stm32f4: adapted to GPIO changes
2016-03-17 14:55:30 +01:00
Hauke Petersen
4383fbf60b
cpu/stm32f4/uart: use common clk_en functions
2016-03-16 12:24:51 +01:00
Hauke Petersen
b23cde98cf
cpus: adapted UART implementations to cb type change
2016-03-15 11:02:06 +01:00
Joakim Nohlgård
7a7202034b
cpu/stm32f4: Use {} notation for empty while loops
2016-03-03 16:31:27 +01:00
Joakim Nohlgård
c61c1207df
cpu/stm32f4: Cast enum to unsigned int for comparison
2016-02-28 00:08:12 +01:00
Joakim Nohlgård
4fd7f23650
cpu/stm32f4: Fix DMA race bug ( #4716 )
2016-01-30 07:04:26 +01:00
Hauke Petersen
a2247a3400
cpu/stm32f4: significantly optimized UART driver
2015-12-07 18:00:40 +01:00
Hauke Petersen
1eb63f20a7
cpu/stm32f4: adapted UART driver
2015-10-27 14:59:38 +01:00
Hauke Petersen
97af043227
cpu/stm32f4: adapted UART driver
2015-10-27 14:59:37 +01:00
Hauke Petersen
d17973a060
cpu/stm32f4: optimized baudrate calculation
2015-09-18 12:21:46 +02:00
Hauke Petersen
e7fbaf3815
cpu: removed NAKED attribute from ISRs
...
- removed the __attribute__((naked)) from ISRs
- removed ISR_ENTER() and ISR_EXIT() macros
Rationale: Cortex-Mx MCUs save registers R0-R4 automatically
on calling ISRs. The naked attribute tells the compiler not
to save any other registers. This is fine, as long as the
code in the ISR is not nested. If nested, it will use also
R4 and R5, which will then lead to currupted registers on
exit of the ISR. Removing the naked will fix this.
2014-10-30 19:33:32 +01:00
Thomas Eichinger
aefa818338
stm32f4: be UART0 aware
2014-09-26 14:16:31 +02:00
Fabian Nack
edb6a4ddf4
cpu - stm32f4: added support for more channels/devices in periph impls
2014-09-01 21:29:56 +02:00
Hauke Petersen
037820d6a6
board/cpu: adjusted uart driver implementations
...
for
- sam3x8e
- stm32f0
- stm32f4
- sam3x8e
- nrf51822
2014-08-11 15:08:20 +02:00
Hauke Petersen
2fa9b4de82
cpu: Initial import of stm32f4
2014-07-16 17:20:46 +02:00