The GPIO for RX has to be initialized as input before the GPIO for TX can be initialized as output. Otherwise it could lead to creash if RX GPIO was used as output before.
Function uart_set_baudrate which is only used internally was made static and renamed to _uart_set_baudrate to indicate that it is an internal function. Furthermore, an additional waiting for flushed TX FIFO added. The reconfiguration is now handled as critical section.
An additional _ for static symbols has been added by mistake and should be removed. This will make future merging with the reimplementation of ESP8266 easier.
There is an error when the start byte NACKs
The nack sets the stop bit twice which keeps the stop bit high the next time
When the stop bit is high it creates a timeout when trying to use
This commit fixes so when a NACK occures on the address it doesn't stop twice
It must be evaluated in `cortexm_common` without a shell context.
The `K` is correctly handled by both the linker and `cortexm_common`.
Co-authored-by: Gaëtan Harter <gaetan.harter@fu-berlin.de>
The build system contains several instances of
INCLUDES += -I$(RIOTBASE)/sys/posix/include
This is bypassing the module management system, by directly accesing
headers without depending on a module. The module is the posix module.
That line is also added when one of the posix_* modules is requested.
According to the docs, the posix module provides headers only, but in
reality there is also inet.c.
This patch:
- Moves `inet.c` into `posix_inet`, leaving `posix` as a headers-only
module.
- Rename `posix` as `posix_headers` to make it clear the module only
includes headers.
- Makes `posix_*` modules depend on `posix_headers`, thus removing the
explicit `INCLUDES+=...` in `sys/Makefile.include`.
- Ocurrences of `INCLUDES+=...` are replaced by an explicit dependency
on `posix_headers`.
USART_CR1_M combines both USART_CR1_M0 and USART_CR1_M1 macros
affecting bits 12 and 28 on 7 data bits capable UARTs. Whereas
for other UARTs USART_CR1_M macro affects only bit 12.
This patch fixes wrong data bits usage on 7 data bits capable
UARTs with using USART_CR1_M0 macro for modes 8-E-x and 8-O-x.
It also simplifies bits unsetting as USART_CR1_M macro clears
all data bits related bits for both UART types.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
The timer_clear function doesn't clear the hardware timer counter, but
is designed to clear the allocation of the channel. The consequence is
that the IFS timer here is not set to zero in the callback, but only
stopped at the current value. When the timer is started again, it has to
count the full timer range until it matches the timeout value again.
This commit fixes this issue by using timer_set instead of
timer_set_absolute. This way the current timer value (when the timer is
stopped) is read and the IFS timeout value is added to the current timer
value.
ieee802.15.4 specifies 40 symbols as LIFS value and 12 symbols as SIFS
value. Furthermore, the 2.4Ghz DSSS mode has a symbol rate of
62.5Ksymbols/s. To have the LIFS and SIFS in the code match the timings
from the specification, the TIMER_FREQ must match the symbol rate of
62.5Ksymbol/s such that one tick of the timer equals one symbol in time.
If the GPIO is in an output state, gpio_init() can return 0 without bad
consequences.
-1 was return until now.
Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
Calling the initialization function ensures that the dummy lwIP library is used instead of the real lwIP, even if the esp_wifi module for esp8266 is not used.
The documentation had to be changed due to the relation of module `esp_now` to `esp_wifi` module. In addition, a number of corrections have been made. In the case of documentation, it is impossible to do this in various commits.
Usually, all .rodata sections are placed in RAM by the Espressif SDK since IROM (flash) access requires 32-bit word aligned reads. thanks to the LoadStoreError exception handler from esp-open-rtos which is used now in RIOT-OS, it is also possible to place .rodata sections in IROM (flash) to save RAM resources.
Usually, the access to the IROM (flash) memory requires 32-bit word aligned reads. Attempts to access data in the IROM (flash) memory less than 32 bits in size triggers a LoadStoreError exception. With the exception handler from esp-open-rtos it becomes possible to access data in IROM (flash) with a size of less than 32 bits and thus to place .rodata sections in the IROM (flash).
