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Commit Graph

7 Commits

Author SHA1 Message Date
Benjamin Valentin
90a6d90df8 cpu/gd32v: uart: fix function parameter 2021-11-18 10:14:51 +01:00
Leandro Lanzieri
a015508e77
cpu/gd32v: model Kconfig 2021-10-01 11:26:15 +02:00
Karl Fessel
fe03c4c059 cpu/riscv,gd32: match Kconfig to Makefile changes 2021-09-22 15:50:28 +02:00
Karl Fessel
645cb04c4d cpu/riscv,gd32v: add CPU_ARCH, CPU_CORE information
adds CPU_ARCH to riscv_common preparing to handle it like cortex-m does
adds CPU_CORE to gd32v
2021-09-22 14:39:44 +02:00
Benjamin Valentin
a75ae3c938 cpu/riscv_common: move C lib selection to common place 2021-08-25 10:53:00 +02:00
Benjamin Valentin
e92a4b9628 cpu/gd32v: enable periph_timer_periodic 2021-08-25 10:48:48 +02:00
3d470b0c12 cpu/gd32v: Initial include of the GD32VF103 device
This adds support for the gd32v class devices from Gigadevice. The
gd32vf103 contains an 108 MHz RISC-V core with similar peripherals as
the stm32f1 devices

Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2021-08-24 14:30:23 +02:00