Reading CVAL after stopping timer seem to return zero.
Ref. manual states: "The counter period can be restarted, by first
disabling, and then enabling the timer with TCTRLn[TEN]", but does not
state whether the reset of CVAL happens on TEN 0->1 transition, or 1->0
transtion. Empirical evidence suggests the latter is the implemented behaviour.
The ARBL flag signals that bus master arbitration has been lost.
This may occur if devices on the bus misbehave, or in a multi-master
situation, or if devices are not powered and pull the SDA line down, or
if the communication wires are disconnected while communicating.
- Merged the two kinetis_common ldscripts into a single script.
- Updated cpus to use the new script
- Updated K60 to merge sram_l and sram_u into one segment
- Use hwtimer_set for hwtimer_set_absolute()
- Collect hwtimer statistics with #if ENABLE_STATS
- Assembler optimized functions for CNR handling
- Correct off-by-1 after counter reset
- Defer CMR update from hwtimer_unset until ISR fires
- Set the proper prescaler value depending on requested frequency
- Return the actual achieved frequency in pwm_init
- Handle 1-8 channels depending on periph_conf.h instead of 4 fixed
- Perform function argument verification before touching the hardware
- Turn on PORT clock gate before touching PORT registers
- Eliminate some magic numbers
add peripheral drivers for Freescale Kinetis MCUs:
adc driver
cpuid driver
gpio driver
hwtimer_arch driver (hwtimer used Low Power Timer)
i2c driver (master mode only)
mcg driver
pwm driver
random_rnga driver
random_rngb driver
rtc driver
spi driver
timer driver (timer used Periodic Interrupt Timer)
uart driver
add doc.txt (configuration examples)
random_rnga: Update RNGA driver in preparation for RNGB driver.
random_rngb: Add RNGB driver.
spi: refactor SPI to work for multiple CTARS, add spi_acquire, spi_release
gpio: Add gpio_irq_enable, gpio_irq_disable. Refactor GPIO.
gpio: Add gpio_irq_enable, gpio_irq_disable.
gpio: Refactor ISR functions to work with all GPIOs (0-31) and all ports (PORTA-PORTH)
adc: Refactor ADC, add calibration and scaling.
Added integer scaling of results in adc_map.
Handle precision setting in adc_init.
Set ADC clock divider depending on module clock.
Add ADC_1 as a possible device.
Add ADC calibration procedure according to K60 ref manual.
Handle ADC pins which are not part of the pin function mux.
Signed-off-by: Joakim Gebart <joakim.gebart@eistec.se>
