Benjamin Valentin
4095eac9f2
cpu: mips32r2_common: set BITARITHM_HAS_CLZ
...
The MIPS ISA implements CLZ:
https://ti.tuwien.ac.at/cps/teaching/courses/cavo/files/MIPS32-IS.pdf
For `tests/periph_gpio` this shaves off 20 bytes on `6lowpan-clicker`.
2021-02-02 11:14:38 +01:00
0b01a999be
cpu/mips32r2_common: Inline thread_yield_higher function
2021-01-19 11:03:21 +01:00
Marian Buschsieweke
dd48ced151
cpu/*/atomic_utils_arch.h: Add volatile qualifier
2020-11-24 14:00:52 +01:00
792e031a95
Merge pull request #14331 from maribu/atomic_utils
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sys/atomic_utils: Functions for atomic access
2020-11-12 21:44:53 +01:00
Marian Buschsieweke
1d2e0592d3
cpu/mips32r2_common: Add atomic_utils_arch.h
2020-11-10 10:55:13 +01:00
Marian Buschsieweke
d9525f38b0
cpu/mips32r2_common: Add architecture_arch.h
2020-09-29 12:34:00 +02:00
Francois Berder
7bbf21e2d3
cpu: mips32r2_common: Implement mips32r2_isr_end
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Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2020-03-25 19:10:01 +00:00
Francois Berder
535fff26ae
cpu: mips: Refactor EIC
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Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2020-03-25 19:10:01 +00:00
Marian Buschsieweke
314184adb5
cpu: Platform specific C11 atomics compat headers
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Added headers to define platform specific sizes and types for the C11 atomics
compatibility module for C++.
2019-10-24 23:08:36 +02:00
Francois Berder
89d43c3423
cpu: mips32r2_common: Remove useless includes
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Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2019-10-18 18:57:42 +01:00
Francois Berder
3a62b620bc
cpu: mips_pic32_common: Move cpu header to mips32r2_common
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Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2019-10-18 18:57:42 +01:00
938677cc83
cpu*: fix doxygen grouping
2018-06-11 19:12:02 +02:00
Gaëtan Harter
062fbd85ce
cpu/mips32r2_generic: add new cpu that depends on mips32r2_common
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Prepare to make `mips32r2_common` only a common cpu and not a standalone one.
2017-11-24 16:44:46 +01:00
Hauke Petersen
5920d99752
pm: fix weak-based default implementations
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Instead of using `weak` function definitions, this PR handles
default implementations using `PROVIDES_x` defines, allowing
for cpus/pm realted modules to use their own implementations.
2017-10-16 14:27:35 +02:00
2b3a9d2e82
cpu/mips: cleanup doxygen documentation
2017-08-28 13:27:58 +02:00
0fcc7d3834
cleanup: apply headerguard script output
2017-05-24 17:54:02 +02:00
Hauke Petersen
9aad0e528f
cpu: cleanup unused/umimplemented isr stack code
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- removed ISR_STACKSIZE define where unused (set to 0)
- removed thread_arch_isr_stack_usage(), thread_arch_isr_stack_start(),
and/or thread_arch_isr_stack_pointer() where not implemented
2017-05-12 18:07:08 +02:00
Neil Jones
1838ca575a
cpu: mips: Add EIC interrupt mode support.
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Note this is only supported in unvectored mode currently.
2017-03-24 13:44:15 +00:00
Neil Jones
c74ec1c253
cpu: mips: Add support for mips32r2
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cpu/mips32r2_common adds base architecture support for mips32r2 cores it can be
built in it own right as a 'CPU', but is dependant on a bootloader (like
u-boot) to have bootstrapped the system, this has been tested on a 'malta'
FPGA system (BOARD=mips-malta) with various mips32r2 compliant cores
(interAptiv, P5600, etc).
2017-02-09 12:18:44 +00:00
