RIOT-OS/RIOT
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15,466 Commits 40 Branches 189 Tags 262 MiB
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13 Commits

Author SHA1 Message Date
Kaspar Schleiser
277189ef05 cpu: k60: remove ssp code 2017-06-27 18:05:14 +02:00
Hauke Petersen
9b7ece6827 cpu/kinetis: prevent use of symlinks for ld-scripts 
The use of symbolic links leads to trouble in certain environments
(e.g. vagrant under Win). This PR gets rid of symlinks and uses
variables in the Makefiles to map to the correct linkerscripts
instead.
 2017-05-26 16:07:48 +02:00
Francisco Acosta
ffd67cacea Merge pull request #6789 from gebart/pr/cpu-model-redundant 
kinetis: Remove duplicate CPU_MODEL CFLAGS definition
 2017-04-05 16:08:33 +02:00
Joakim Nohlgård
339a4da9dc Makefiles: move to new directory /makefiles 2017-04-04 15:11:54 +02:00
Joakim Nohlgård
d578f9bfdc kinetis: Remove duplicate CPU_MODEL CFLAGS definition 
These are already provided by cortexm_common
 2017-03-25 18:28:35 +01:00
Kaspar Schleiser
560a509036 make: remove trailing slash from BINDIR variable 2016-10-18 23:27:59 +02:00
Kaspar Schleiser
d1198b489d cpu: k60: rename vector.c -> vectors.c, add to SRC_NOLTO 2016-08-29 17:29:53 +02:00
Johann Fischer
e95afc80fb kinetis_common: use cortexm_common ldscript 
kinetis.ld includes cortexm_common ldscript, the fields for the
isr vectors and fcfield remain in kinetis.ld.
 2015-10-23 12:01:22 +02:00
Hauke Petersen
8db0a57a81 cpu/k60: optimization of startup code 2015-06-15 16:00:51 +02:00
Johann F
14542765a5 cpu/k60: use cortex common makefile and newlib module 2015-05-31 18:25:57 +02:00
Hauke Petersen
d4d34a782e cpu/k60: adapted to centralized cpu conf 2015-05-29 16:42:05 +02:00
haukepetersen
0d5c8546f3 cpu: adapted Makefiles to unified cortexm module 2015-05-28 19:30:07 +02:00
Joakim Gebart
de486ff79f k60: Initial commit of K60 CPU. 
Tested on the following Freescale Kinetis K60 CPUs:

 - MK60DN512VLL10

The port should with a high probability also support the following variations of the above CPUs (untested):

 - MK60DN256VLL10

And possibly also:

 - MK60DX256VLL10
 - MK60DX512VLL10
 - MK60DN512VLQ10
 - MK60DN256VLQ10
 - MK60DX256VLQ10
 - MK60DN512VMC10
 - MK60DN256VMC10
 - MK60DX256VMC10
 - MK60DN512VMD10
 - MK60DX256VMD10
 - MK60DN256VMD10

Currently not working on the following CPUs (Missing PIT channel
chaining necessary for kinetis_common/periph/timer implementation):

 - MK60DN256ZVLL10
 - MK60DN512ZVLL10
 - MK60DX256ZVLL10
 - MK60DX512ZVLL10
 - MK60DN512ZVLQ10
 - MK60DN256ZVLQ10
 - MK60DX256ZVLQ10
 - MK60DN512ZVMC10
 - MK60DN256ZVMC10
 - MK60DX256ZVMC10
 - MK60DN512ZVMD10
 - MK60DX256ZVMD10
 - MK60DN256ZVMD10

Regarding header files from Freescale:

   dist/tools/licenses: Add Freescale CMSIS PAL license pattern

Redistribution is OK according to:

https://community.freescale.com/message/477976?et=watches.email.thread#477976

Archive copy in case the above link disappears:

https://web.archive.org/web/20150328073057/https://community.freescale.com/message/477976?et=watches.email.thread

Applies to:
 - MK60DZ10.h (K60 variant)
 2015-03-28 08:30:13 +01:00