Fix compilation with module `stm32_eth_link_up` when `stm32_eth_auto`
is not used by relying on the compiler to optimize unused functions
and variables out, rather than using the preprocessor.
- Clear the PTP timer interrupt *after* the user callback is executed
- Otherwise it would be possible that the ISR sets another super
short timeout that triggers during ISR, which also gets cleared
- This is a pretty nasty race condition :-/
- The debug output was a bit too verbose to be generally useful. Some
noise is now silenced unless `DEBUG_VERBOSE` is `#define`d to 1
Atmel AVR-8 CPU was reworked to accomodate variants like ATxmega.
This rename to atmega.inc.mk to avr8.inc.mk to be compliant with
new directory structure.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
ATxmega have many clock options. This introduce clk_init into cpu_init
to allow user select between a default configuration or perform fine
clock tune.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The XMEGA CPU have a Programmable Multilevel Interrupt Controller.
This enables all three PMIC levels. By default, all interrupts are
preconfigured as LOW Level without Round Robin queue. This works
as any MCU with interrupt enabled.
In order to get benefit from Multilevel Interrupts user need increase
the interrupt level by own.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Current there is no way to split code between ATmega and ATxmega in
drivers. This differentiate AVR8 cores into MEGAs and XMEGAs.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current context switch and thread stack init don't have a generic
way to save/restore registers for all AVR-8 variations. This add
defines to check flash/data sizes and rework:
- thread_stack_init
- avr8_context_save
- avr8_context_restore
The new implementation add missing RAMP D/X/Y registers that are used
by XMEGA variations.
The rules to add EIND, RAMP(D,X,Y,Z) register are:
- EIND must be added if device have more than 128k flash. This means,
device can access more than 64k words in flash.
- RAMP D/X/Y must be added if device have or can address more than
64k data.
- RAMPZ must be added if device can address more than 64k bytes of
flash or data.
With above rules there is no necessity to check by device because it is
mandatory the registers for those MCU variations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add ATxmega common files and cpu definitions.
This works was originally developed by @Josar. The 2018 version
were port to 2021 mainline.
This version changes original port to have only the atxmega CPU
definition. With that, all family can be accomodated.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some mega boards enabling global irq at board_init. This moves that
responsability to cpu/avr8_common to create a common point to all
variants.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The ATxmega can have up to 8 UARTs. This increase from 2 up to 7 to
keep avr8_state flags with 8 bits wide.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
Some periph_rtt implementations do not provide `rtt_set_counter()`. This
adds `periph_rtt_set_counter` as feature to allow testing for its
availability. The feature is provided at CPU level if periph_rtt is
provided by the board for all CPUs implementing `rtt_set_counter()`.
Found and fixed the issue for the kinetis-based boards: The kinetis
code is using some macros to map some IRQ names, that differ in
some versions of vendor headers, to a RIOT wide unique name. The
doxygen of this mapping states, that this mapping must be done before
any vendor header is included. Unfortunately, the mapping was so far
placed in cpu/kinetis/vectors.c, before any other include statement.
In some cases, the vendor headers might be included before the
mapping macros in vectors.c, leading to the compilation errors down
the line. To fix this, the adaption defines are moved into
cpu/kinetis/cpu_conf.h, which is the file that actually includes
the vendor headers. This way it is ensured, that these adaption
macros are always defined before any vendor header is included,
and therefore preventing this kind of error for good.
- Adds capabilities for each PHY mode. Converts the uint16_t caps field to an
uint32_t in order to hold all capability bits, size of the structure remains
unchanged due to alignment.
- Modifies the test application to configure the PHY mode using the shell
command. Also adds the PHY modes to the capabilities shell command.
- Updates the nrf802154 and cc2538 radio drivers to specify the PHY mode
supported.
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
If there is an event to be handled by _esp_eth_isr(), don't
overwrite it if a new packet has been received.
In my testing, all SYSTEM_EVENT_ETH_CONNECTED events except the first
are immediately followed by at least one SYSTEM_EVENT_ETH_RX_DONE event.
This causes the SYSTEM_EVENT_ETH_CONNECTED to not get handled, and the
IP stack will not be notified of the new link state.
Protect the other events by dropping the packet instead. If an earlier
unhandled SYSTEM_EVENT_ETH_RX_DONE event exists, overwrite it with the
newer packet.
I only saw this happen with lwIP and not with GNRC - I am not sure why.
But it still is a race waiting to happen. The nice long term solution
is probably to have a queue of unhandled events, allowing them all to
be processed once there is time.
