This is a rewrite of the Kinetis GPIO driver which follows the
refactored API in [1]. Pins are specified using the GPIO_PIN(PORT_x, y)
macro, e.g. GPIO_PIN(PORT_E, 25) for the PTE25 pin.
The interrupt pin handling is now implemented as a linked list, this
is more memory efficient, but with a minor variation in interrupt
latency depending on in what order the pins were initialized at
runtime.
Because the linked list entries are taken from a shared pool, there is
also the possibility of running out of available configuration slots,
define the preprocessor macro GPIO_INT_POOL_SIZE in periph_conf.h if
you need more than 16 pins configured for interrupts in the same
application.
[1]: https://github.com/RIOT-OS/RIOT/pull/3095
add peripheral drivers for Freescale Kinetis MCUs:
adc driver
cpuid driver
gpio driver
hwtimer_arch driver (hwtimer used Low Power Timer)
i2c driver (master mode only)
mcg driver
pwm driver
random_rnga driver
random_rngb driver
rtc driver
spi driver
timer driver (timer used Periodic Interrupt Timer)
uart driver
add doc.txt (configuration examples)
random_rnga: Update RNGA driver in preparation for RNGB driver.
random_rngb: Add RNGB driver.
spi: refactor SPI to work for multiple CTARS, add spi_acquire, spi_release
gpio: Add gpio_irq_enable, gpio_irq_disable. Refactor GPIO.
gpio: Add gpio_irq_enable, gpio_irq_disable.
gpio: Refactor ISR functions to work with all GPIOs (0-31) and all ports (PORTA-PORTH)
adc: Refactor ADC, add calibration and scaling.
Added integer scaling of results in adc_map.
Handle precision setting in adc_init.
Set ADC clock divider depending on module clock.
Add ADC_1 as a possible device.
Add ADC calibration procedure according to K60 ref manual.
Handle ADC pins which are not part of the pin function mux.
Signed-off-by: Joakim Gebart <joakim.gebart@eistec.se>
