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Commit Graph

5 Commits

Author SHA1 Message Date
Marian Buschsieweke
355f2335d5
cpu/msp430: implement gpio_ll_irq 2024-08-02 13:41:37 +02:00
Marian Buschsieweke
0ce7b8dfde
cpu/msp430: add periph_gpio_ll 2024-08-02 13:41:37 +02:00
Marian Buschsieweke
aef5b65244
cpu/msp430/f2xx: clean up periph_uart,periph_spi
This cleans up the USCI based UART and SPI implementations and allows
multiple instances of either interface to be configured by the
boards. In addition, it allows sharing the USCI peripherals to provide
multiple serial interfaces with the same hardware (round-robin).
2024-03-27 18:54:07 +01:00
Marian Buschsieweke
7044699388
cpu/msp430: improve periph_timer
- add support for multiple timers
- add support for selecting clock source in the board's `periph_conf.h`
- add support for the prescaler
- implement `periph_timer_query_freqs`
- add a second timer to all MSP430 boards
    - the first timer is fast ticking, high-power
    - the second is slow ticking, low-power
2023-12-10 09:11:23 +01:00
Marian Buschsieweke
ff7f8ae2f0
cpu/msp430: reorganize code
RIOT supports two distinct families of the MSP430: The [MSP430 x1xx]
MCU family and the [MSP430 F2xx/G2xx] MCU family. For both incompatible
MCU families the code was located in the msp430fxyz folder, resulting
in case of the UART driver in particularly bizarre code looking roughly
like this:

    #ifndef UART_USE_USCI
    /* implementation of x1xx peripheral ... */
    #else
    /* implementation of F2xx/G2xx peripheral ... */
    #endif
    /* zero shared code between both variants */

This splits the peripheral drivers for USCI and USART serial IP blocks
into separate files and relocates everything in cpu/msp430, similar to
how cpu/stm32 is organized.

[MSP430 x1xx]: https://www.ti.com/lit/ug/slau049f/slau049f.pdf
[MSP430 F2xx/G2xx]: https://www.ti.com/lit/ug/slau144k/slau144k.pdf
2023-06-19 17:14:57 +02:00