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Commit Graph

12 Commits

Author SHA1 Message Date
Gunar Schorcht
d19a1f5af5 cpu/esp32: remove the dependency of vendor code on BOARDDIR 2020-08-07 16:09:12 +02:00
Gunar Schorcht
5fbf74b203 cpu/esp32: fix printf for float with newlib-nano 2020-05-02 16:56:29 +02:00
benpicco
45b635f4c5
Merge pull request #13416 from gschorcht/cpu/esp32/pm_layered
cpu/esp32: support for light/deep sleep and pm_layered
2020-03-23 14:11:05 +01:00
Gunar Schorcht
3faf99a894 cpu/esp32: add vendor files for light/deep sleep 2020-03-23 12:25:47 +01:00
Gunar Schorcht
202758f400 cpu/esp32/esp_wifi: changes for wpa_supplicant in WPA2 Enterprise mode
`nvs_flash` functions have to be set to 0 if module `esp_idf_nvs_flash` is not enabled. Otherwise wpa_supplicant will crash in WPA2 Enterprise mode.
2020-02-23 10:09:48 +01:00
benpicco
57db6b7313
Merge pull request #13059 from gschorcht/cpu/esp32/fix_xtal_freq
cpu/esp32: activate automatic XTAL detection
2020-01-31 08:36:28 +01:00
Gunar Schorcht
416e8ce8e6 cpu/esp32: fix C linkage compilatio error
With the new toolchain version required to fix issue #13133, the compilation of `examples/posix_socket` fails due to a C linkage error in `atomic_base.h`. The reason is that including `drivers/include/mtd.h` in `boards/esp32/board_common.h` inside the `extern C` block finally leads to including `atomic_base.h` inside the `extern C` block which in turn to the C linkage error for the template definitions in this file.
2020-01-16 13:03:49 +01:00
Gunar Schorcht
528512d9af cpu/esp32: activate automatic XTAL detection
ESP32 can be clocked with either a 40 MHz or 26 MHz crystal. Since most boards use a 40 MHz crystal, the configuration was previously fixed to a 40 MHz crystal. This commit changes the crystal from 40 MHz to automatic detection, allowing boards with a 26 MHz crystal like the Sparkfun ESP32 Thing DEV to be used.
2020-01-09 15:34:18 +01:00
a8c3c6ab68 cpu/esp32: fix typos 2019-11-23 22:39:36 +01:00
Gunar Schorcht
1492f00690 cpu/esp32: esp_wifi compile configuration tuned
Downsized numbers of dynamic send and receive buffers.
2019-07-31 13:53:48 +02:00
Jens Alfke
ce1fe776cf cpu/esp32: allow explicit ESP32 crystal freq configuration
Some ESP32 boards (like my SparkFun ESP32 Thing) have a main clock
crystal that runs at 26MHz, not 40MHz. RIOT appears to assume 40MHz.
The mismatch causes the UART to not sync properly, resulting in
garbage written to the terminal instead of log output.

I’ve added:

* A new board configuration constant ESP32_XTAL_FREQ that defaults
  to 40, but can be overridden by a board def or at build time to
  force a specific value (i.e. 26).
* Some code spliced into system_clk_init() to check this constant and
  call rtc_clk_init() to set the correct frequency.
* A copy of the rtf_clk_init() function from the ESP-IDF sources.

Fixes #10272
2018-10-30 16:42:07 -07:00
Schorcht
3ac99877ac cpu: add esp32 2018-10-08 12:20:49 +02:00