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3 Commits

Author SHA1 Message Date
Marian Buschsieweke
aef5b65244
cpu/msp430/f2xx: clean up periph_uart,periph_spi
This cleans up the USCI based UART and SPI implementations and allows
multiple instances of either interface to be configured by the
boards. In addition, it allows sharing the USCI peripherals to provide
multiple serial interfaces with the same hardware (round-robin).
2024-03-27 18:54:07 +01:00
Marian Buschsieweke
675dcc381c
cpu/msp430: rework MSP430 x1xx periph drivers
- Move common code for USART (shared SPI / UART peripheral) to its
  own file and allow sharing the USART peripheral to provide both
  UART and SPI in round-robin fashion.
- Configure both UART and SPI bus via a `struct` in the board's
  `periph_conf.h`
    - this allows allocating the two UARTs as needed by the use case
    - since both USARTs signals have a fixed connection to a single
      GPIO, most configuration is moved to the CPU
    - the board now only needs to decide which bus is provided by
      which USART

Note: Sharing an USART used as UART requires cooperation from the app:
- If the UART is used in TX-only mode (no RX callback), the driver
  will release the USART while not sending
- If the UART is used to also receive, the application needs to power
  the UART down while not expecting something to send. An
  `spi_acquire()` will be blocked while the UART is powered up.
2024-01-22 16:59:23 +01:00
Marian Buschsieweke
ff7f8ae2f0
cpu/msp430: reorganize code
RIOT supports two distinct families of the MSP430: The [MSP430 x1xx]
MCU family and the [MSP430 F2xx/G2xx] MCU family. For both incompatible
MCU families the code was located in the msp430fxyz folder, resulting
in case of the UART driver in particularly bizarre code looking roughly
like this:

    #ifndef UART_USE_USCI
    /* implementation of x1xx peripheral ... */
    #else
    /* implementation of F2xx/G2xx peripheral ... */
    #endif
    /* zero shared code between both variants */

This splits the peripheral drivers for USCI and USART serial IP blocks
into separate files and relocates everything in cpu/msp430, similar to
how cpu/stm32 is organized.

[MSP430 x1xx]: https://www.ti.com/lit/ug/slau049f/slau049f.pdf
[MSP430 F2xx/G2xx]: https://www.ti.com/lit/ug/slau144k/slau144k.pdf
2023-06-19 17:14:57 +02:00