ADC pins are now configured using static arrays in header files instead of static variables in implementation to be able to define ADC_NUMOF using the size of these arrays instead of a variable.
Functions that are used by ADC and DAC peripherals are moved to a new submodule periph_adc_ctrl. This is necessary to compile separate submodules for ADC and DAC.
`top_of_stack` isn't aligned down to the previous 16 byte aligned address. Furthermore, `top_of_stack` as well as `XT_CP_SIZE` are used unaligned in `cpu/esp_common/vendor/xtensa/portasm.S` in the address computation for the coprocessor save area, .
Aligning pointer `p` down to the previous 16 byte aligned address results in a wrong address of the coprocessor save area during the initialization of the thread context. This leads to wrong values and wrong positions of these values in the coprocessor save area in inital thread context.
Since ESP8266 doesn't have a coprocessor, this bug affects only ESP32.
During the flash step esptool.py gives the following warning:
WARNING: Flash size arguments in megabits like '16m' are deprecated.
Please use the equivalent size '2MB'.
Megabit arguments may be removed in a future release.
esptool.py v2.7-dev
This patch replaces '16m' with '2MB' to enable future compatibility.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Fix of #11354: Function '_write_r' of ESP32's newlibc does not write the output of function 'write(STDIO_FILENO, ...)' to the UART interface. To fix this problem, module 'newlib_syscalls_default' is now used by default. Function '_write_r' of module 'newlib_syscalls_default' uses 'stdio_write' which in turn uses 'uart_write' if module 'stdio_uart' is used which is now the default case for ESP32.
The GPIO for RX has to be initialized as input before the GPIO for TX can be initialized as output. Otherwise it could lead to creash if RX GPIO was used as output before.
Function uart_set_baudrate which is only used internally was made static and renamed to _uart_set_baudrate to indicate that it is an internal function. Furthermore, an additional waiting for flushed TX FIFO added. The reconfiguration is now handled as critical section.
An additional _ for static symbols has been added by mistake and should be removed. This will make future merging with the reimplementation of ESP8266 easier.
The build system contains several instances of
INCLUDES += -I$(RIOTBASE)/sys/posix/include
This is bypassing the module management system, by directly accesing
headers without depending on a module. The module is the posix module.
That line is also added when one of the posix_* modules is requested.
According to the docs, the posix module provides headers only, but in
reality there is also inet.c.
This patch:
- Moves `inet.c` into `posix_inet`, leaving `posix` as a headers-only
module.
- Rename `posix` as `posix_headers` to make it clear the module only
includes headers.
- Makes `posix_*` modules depend on `posix_headers`, thus removing the
explicit `INCLUDES+=...` in `sys/Makefile.include`.
- Ocurrences of `INCLUDES+=...` are replaced by an explicit dependency
on `posix_headers`.
The default macros GPIO_PIN and GPIO_UNDEF do not have to be overridden. The GPIO_PIN macro definition was even wrong for 40 GPIOs without splitting into ports, even if that did not lead to erroneous behavior.
Fixes sporadic blocking of the wifi thread in esp_wifi_recv_cb function under heavy network load conditions when frames are coming in faster than they can be processed. Since esp_wifi_recv_cb function is not executed in interrupt context, the msg_send function used for ISR event can block when the message queue is full. With this change esp_wifi can be flooded with icmpv6 packets of maximum size without any problems over hours.
