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Commit Graph

103 Commits

Author SHA1 Message Date
9d49a30560
stm32: Remove obsolete spi_divtable tool 2020-08-18 16:55:01 +02:00
b9d62e47d3
stm32: Add support for arbitrary SPI clock rates 2020-08-18 16:55:01 +02:00
benpicco
22d3bf7c51
Merge pull request #14594 from maribu/stm32-eth-cleanup
cpu/stm32: Clean up / fix periph_eth
2020-08-17 21:16:27 +02:00
Marian Buschsieweke
4fcf37c162
cpu/stm32/periph_eth: Handle lost & spurious IRQs
Fixes https://github.com/RIOT-OS/RIOT/issues/13496
2020-08-17 20:30:16 +02:00
Marian Buschsieweke
8d8af31e39
driver/stm32_eth: Integrate into periph_eth
The stm32_eth driver was build on top of the internal API periph_eth, which
was unused anywhere. (Additionally, with two obscure exceptions, no functions
where declared in headers, making them pretty hard to use anyway.)

The separation of the driver into two layers incurs overhead, but does not
result in cleaner structure or reuse of code. Thus, this artificial separation
was dropped.
2020-08-17 20:29:33 +02:00
Marian Buschsieweke
28ed07d6e3
cpu/stm32/periph_eth: zero-copy TX (-6 KiB RAM)
The Ethernet DMA is capable of collecting a frame from multiple chunks, just
like the send function of the netdev interface passes. The send function was
rewritten to just set up the Ethernet DMA up to collect the outgoing frame
while sending. As a result, the send function blocks until the frame is
sent to keep control over the buffers.

This frees 6 KiB of RAM previously used for TX buffers.
2020-08-17 20:29:33 +02:00
Marian Buschsieweke
51fe77afa4
cpu/stm32/periph_eth: configurable buffer size
1. Move buffer configuration from boards to cpu/stm32
2. Allow overwriting buffer configuration
    - If the default configuration ever needs touching, this will be due to a
      use case and should be done by the application rather than the board
3. Reduce default RX buffer size
    - Now that handling of frames split up into multiple DMA descriptors works,
      we can make use of this

Note: With the significantly smaller RX buffers the driver will now perform
much worse when receiving data at maximum throughput. But as long as frames
are small (which is to be expected for IoT or boarder gateway scenarios) the
performance should not be affected.
2020-08-17 20:29:29 +02:00
Marian Buschsieweke
932c311ee2
cpu/stm32/periph_eth: Fix RX logic
If any incoming frame is bigger than a single DMA buffer, the Ethernet DMA will
split the content and use multiple DMA buffers instead. But only the DMA
descriptor of the last Ethernet frame segment will contain the frame length.

Previously, the frame length calculation, reassembly of the frame, and the
freeing of DMA descriptors was completely broken and only worked in case the
received frame was small enough to fit into one DMA buffer. This is now fixed,
so that smaller DMA buffers can safely be used now.

Additionally the interface was simplified: Previously two receive flavors were
implemented, with only one ever being used. None of those function was
public due to missing declarations in headers. The unused interface was
dropped and the remaining was streamlined to better fit the use case.
2020-08-17 20:28:49 +02:00
benpicco
ea42705637
Merge pull request #14564 from benpicco/cpu/stm32-bitarithm_test_and_clear
cpu/stm32: GPIO: use bitarithm_test_and_clear()
2020-08-11 14:05:38 +02:00
Marian Buschsieweke
7d9aed7f66
Merge pull request #14391 from benpicco/cpu/stm32-timer_periodic
cpu/stm32: implement periph_timer_periodic
2020-08-10 07:58:27 +02:00
Benjamin Valentin
a0972c9e0c cpu/stm32: implement periph_timer_periodic
Seems like the Interrupt flag for a Capture/Compare channel gets set when

- the CC-value is reached
- the timer resets before the CC value is reached.

We only want the first event and ignore the second one. Unfortunately I did
not find a way to disable the second event type, so it is filtered in software.

That is we need to

 - ignore the CC-interrupts when the COUNT register register is reset
 - ignore the CC-interrupts > TOP value/ARR (auto-reload register)
2020-08-09 22:55:22 +02:00
Marian Buschsieweke
234a720571
Merge pull request #14516 from benpicco/bitband_hw
cortexm_common: fix check for bitbanding feature
2020-08-08 14:26:49 +02:00
Benjamin Valentin
97bf000bcd cpu/stm32: use RIOT_EPOCH 2020-08-07 17:39:25 +02:00
Benjamin Valentin
9970c57cdf cpu/stm32: GPIO: use bitarithm_test_and_clear() 2020-07-28 12:43:24 +02:00
millotp
69858916c7 boards: enable CAN bus on nucleo-f446re & nucleo-f446ze
Changed the pinout for the CAN bus:
CAN RX: PB8
CAN TX: PB9

And added periph_can to FEATURES_PROVIDED and to Kconfig files
2020-07-27 14:36:29 +02:00
Marian Buschsieweke
53375f04bf
cpu/stm32/periph_eth: Optimize / fix flush
- Added missing wait for TX flush
- Grouped access to the same registers of the Ethernet PHY to reduce accesses.
  (The compiler won't optimize accesses to `volatile`, as defined in the C
  standard.)
2020-07-26 22:12:03 +02:00
Marian Buschsieweke
a5dbec33d9
cpu/stm32/periph_eth: Cleanup & fix DMA descriptor
- Add missing `volatile` to DMA descriptor, as memory is also accessed by the
  DMA without knowledge of the compiler
- Dropped `__attribute__((packed))` from DMA descriptor
    - The DMA descriptor fields need to be aligned on word boundries to
      properly function
    - The compiler can now more efficiently access the fields (safes ~300 B ROM)
- Moved the DMA descriptor struct and the flags to `periph_cpu.h`
    - This allows Doxygen documentation being build for it
    - Those types and fields are needed for a future PTP implementation
- Renamed DMA descriptor flags
    - They now reflect to which field in the DMA descriptor they refer to, so
      that confusion is avoided
- Added documentation to the DMA descriptor and the corresponding flags
2020-07-26 22:12:03 +02:00
42eb044ec6
Merge pull request #14482 from hugueslarrive/cpu/stm32/periph/pwm
cpu/stm32/periph/pwm: some bugfixes...
2020-07-24 21:05:57 +02:00
Gunar Schorcht
044d08d599 cpu/stm32: GPIO ports definition fix
The available GPIO ports may also differ within a family. Therefore, the vendor definitions GPIO* are used instad of CPU_FAM_STM definitions to determine which ports are available for a certain MCU.
2020-07-22 09:13:52 +02:00
dada52ecd2
cpu/stm32: add stm32g0 support 2020-07-21 12:45:25 +02:00
dea506a719
cpu/stm32wb: define missing IMR bit in CMSIS 2020-07-16 17:35:50 +02:00
1a095b36fa
cpu/stm32: adapt UART driver for stm32l4r5 cpu line 2020-07-16 17:35:49 +02:00
8e87dedbce
cpu/stm32: remove not needed CMSIS vendor headers 2020-07-16 17:35:49 +02:00
f21440b176
cpu/stm32: use CMSIS headers from the stm32cmsis package 2020-07-16 17:35:48 +02:00
Benjamin Valentin
8f36c88b93 cpu/stm32: set CPU_HAS_BITBAND 2020-07-16 14:44:28 +02:00
8046a74e50
cpu/stm32: model features in Kconfig 2020-07-16 11:34:02 +02:00
055c43c878
cpu/stm32: enable flashpage feature for stm32f031k6 2020-07-16 11:15:30 +02:00
Marian Buschsieweke
aec9eb7f6a
cpu/stm32: Fix uart_init()
- Make use of the fact that gpio_init_af() does not need prior call to
  gpio_init() for all STM32 families anymore and drop call to gpio_init()
- Initialize the UART periph first, before initializing the pins
    - While uninitialized, the UART periph will send signal LOW to TXD. This
      results in a start bit being picked up by the other side.
    - Instead, we do not connect the UART periph to the pins until it is
      initialized, so that the TXD level will already be HIGH when the pins
      are attached.
    - This results in no more garbage being send during initialization
2020-07-15 12:12:46 +02:00
Marian Buschsieweke
73c9161517
cpu/stm32: Fix gpio_init() / gpio_int_af()
- Do not set an intermediate mode, prepare correct mode settings in a temporary
  variable
- Consistently enabled the GPIO periph in gpio_init_af()
    - Previously, STM32 F1 did not require a separate call to gpio_init() prior
      to a call of gpio_init_af(), but other STM32 families did
    - Now, gpio_init_af() can be used without gpio_init() consistently
- STM32 F1: Do not touch ODR for non input pins
    - For input pins, this enables / disabled pull up resistors. For outputs,
      this register should remain untouched (according to API doc)
2020-07-15 12:12:45 +02:00
hugues
0926a04b08 cpu/stm32/periph/pwm: useless static var and a semicolon removed 2020-07-14 01:41:16 +02:00
Gilles DOFFE
892370121d
cpu/stm32/qdec: test null callback pointer (#14125)
cpu/stm32/qdec: test if callback pointer is set

Callback pointer is not tested and could result in a hard fault
if the pointer is NULL.
Thus only activate interrupt if a callback provided.

Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
2020-07-10 15:05:53 +02:00
hugues
304d3f9e8d cpu/stm32/periph/pwm: some bugfixes... 2020-07-10 13:47:45 +02:00
hugues
d069c6e787 cpu/stm32/periph/pwm: CCMR1 was defined a second time instead of CCMR2 2020-07-10 13:47:45 +02:00
hugues
a5da5953b2 cpu/stm32/periph/pwm: multiple devices PWM_RIGHT mode bugfix 2020-07-10 13:47:09 +02:00
hugues
16e454ccaf cpu/stm32/periph/pwm: some bugfixes... 2020-07-09 23:49:00 +02:00
hugues
11e847c9af cpu/stm32: fix off-by-one error in clock frequency assert 2020-07-08 14:17:14 +02:00
Bas Stottelaar
21f9afdb5b
Merge pull request #14318 from benpicco/cpu/stm32-TIMER_CHANNELS
cpu/stm32: use TIMER_CHANNEL_NUMOF for consistency
2020-06-24 15:32:22 +02:00
Benjamin Valentin
06cdd30fcb cpu/stm32: use TIMER_CHANNEL_NUMOF for consistency 2020-06-24 12:58:38 +02:00
25c609f2d3
Merge pull request #12101 from OTAkeys/pr/fix_i2c_release
cpu/stm32_common: disable i2c in release
2020-06-23 10:21:15 +02:00
f546c6238b
cpu/stm32: add support for stm32g4 2020-06-19 14:18:17 +02:00
07c78efc83
Merge pull request #14285 from fjmolinas/pr_uart_nb_race
sam0/stm32: fix possible uart_nonblocking deadlock
2020-06-17 12:14:25 +02:00
Francisco Molina
09f0fd4526
cpu/stm32: avoid deadlock on nonblocking write
If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchrnously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
0b8adb2d27
cpu/sam0-stm32/uart: rename tx buf size to UART_TXBUF_SIZE 2020-06-17 10:01:20 +02:00
Francisco Molina
dd331c91d3
cpu/stm32/uart: enable irq for non blocking uart 2020-06-17 10:01:19 +02:00
Leandro Lanzieri
4d65bc8e0a
cpu: Rename CPU_ARCH to CPU_CORE 2020-06-16 12:05:40 +02:00
Francisco Molina
3107993434
cpu/stm32: add non blocking uart
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-06-11 09:51:41 +02:00
benpicco
f75c971297
Merge pull request #14119 from benpicco/cpu/stm32_usb_bootloader
cpu/stm32: implement reset to bootloader
2020-06-10 23:13:50 +02:00
29739be13a
stm32/spi: Use new DMA setup/prepare functions 2020-06-09 10:20:50 +02:00
b7d0cbcd57
stm32/spi: Remove superfluous DMA stop call
The DMA stream will automatically disable itself as soon as the transfer
is finished. No need to do this an additional time after the transfer is
finished
2020-06-09 10:20:49 +02:00
fddf0897e8
stm32/spi: Acquire/release the DMA during the SPI acquire/release 2020-06-09 10:20:49 +02:00