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5 Commits

Author SHA1 Message Date
Marian Buschsieweke
922276296e
drivers/periph/gpio_ll: pass gpio_conf_t by value
Now that `gpio_conf_t` is on all implemented platforms no larger than
a register, we can more efficiently pass it by value rather than via
pointer.
2024-01-21 09:19:08 +01:00
Marian Buschsieweke
2a00ec13e5
drivers/periph/gpio_ll: shrink gpio_conf_t
This commit optimizes the `gpio_conf_t` type in the following
regards:

- The "base" `gpio_conf_t` is stripped from members that only some
  platforms support, e.g. drive strength, slew rate, and disabling of
  the Schmitt Trigger are no longer universally available but
  platform-specific extensions
- The `gpio_conf_t` is now crammed into a bit-field that is 8 bit or
  16 bit wide. This allows for storing lots of them e.g. in
  `driver_foo_params_t` or `uart_conf_t` etc.
- A `union` of the `struct` with bit-field members and a `bits` is used
  to allow accessing all bits in a simple C statement and to ensure
  alignment for efficient handling of the type

Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2024-01-21 08:38:40 +01:00
Marian Buschsieweke
dd86da6c76
cpu/stm32/periph_gpio_ll: Fix misleading comments
The comments still claim STM32F1 support is missing, but this was
recently added.

Also, drop an empty line to fix `too many consecutive empty lines`
nitpick of the CI.
2023-04-06 08:31:48 +02:00
Marian Buschsieweke
4a0c462ec3
cpu/stm32: Implement gpio_ll for STM32F1
This provides basic GPIO LL support. IRQ support will be added as
follow up.
2023-03-20 14:14:07 +01:00
Marian Buschsieweke
8bab36f1c5
cpu/stm32: Implement periph/gpio_ll{,_irq} except for STM32F1
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
2022-04-22 14:34:57 +02:00