RIOT-OS/RIOT
RIOT-OS/RIOT
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2 Commits

Author SHA1 Message Date
Koen Zandberg
2692957c0e
riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
kenrabold
7d1d5e77d8 cpu/fe310: add RISC-V cpu FE310 
New CPU FE310 from SiFive based on RISC-V architecture

build: add makefile for RISC-V builds

Makefile for builds using RISC-V tools
 2018-05-29 15:21:45 -07:00