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Commit Graph

4 Commits

Author SHA1 Message Date
2692957c0e
riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
128423edc6
cpu/fe310: Use newlib_syscalls_default stub implementations
This switches the fe310 to use the common newlib_syscalls_default
implementation.
2021-01-26 13:42:52 +01:00
Keith Packard
a0d3436486 cpu/fe310: Add PICOLIBC support [v3]
Disable the newlib-nano stubs code when picolibc is in use

Signed-off-by: Keith Packard <keithp@keithp.com>

---
v2:
	Squash fixes in
v3:
	call stdio_init in _PICOLIBC_ mode to initialize uart
v3:
	Remove call to stdio_init from nanostubs_init, always
	call from cpu_init.
2020-08-24 08:24:54 -07:00
kenrabold
7d1d5e77d8 cpu/fe310: add RISC-V cpu FE310
New CPU FE310 from SiFive based on RISC-V architecture

build: add makefile for RISC-V builds

Makefile for builds using RISC-V tools
2018-05-29 15:21:45 -07:00