No need to specify SX127X_PARAMS structure as it is already
defined in drivers/sx127x/include/sx127x_params.h.
Also remove SX127X_PARAM_SPI and SX127X_PARAM_PASELECT as their
values are the same as default ones.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
`top_of_stack` isn't aligned down to the previous 16 byte aligned address. Furthermore, `top_of_stack` as well as `XT_CP_SIZE` are used unaligned in `cpu/esp_common/vendor/xtensa/portasm.S` in the address computation for the coprocessor save area, .
Aligning pointer `p` down to the previous 16 byte aligned address results in a wrong address of the coprocessor save area during the initialization of the thread context. This leads to wrong values and wrong positions of these values in the coprocessor save area in inital thread context.
Since ESP8266 doesn't have a coprocessor, this bug affects only ESP32.
Although not a formal part of the release specs tests, these recently
discovered failures are significant enough to warrant documenting in the
release notes.
Functions marked with __atribute__((naked)) may only use basic inline assembly
and must not use any c code. The functions __enter_thread_mode() and
cpu_switch_context_exit() are using C code, so they must not be marked as
naked.
`tests/gnrc_udp` was specifically introduced for testing the release
specs. All of them ask the tester to check the packet buffer after the
test. So it makes sense to include the module that allows for that per
default for this test so the tester does not forget to include it ;-).
Previously the compiler was allowed to reorder access to the interrupt control
registers in regard to memory access not marked as `volatile` (at least some
people - most notably some compiler developers - read the C standard this way).
In practise this did not happen as irq_disable(), irq_restore(), irq_enable()
are part of a separate compilation unit: Calls to external functions unknown to
the compiler are treated as if they were memory barriers. But if link time
optimization (LTO) is enabled, this no longer would work: The compiler could
inline the code accessing the interrupt control registers and reorder the memory
accesses wrapped in irq_disable() and irq_restore() outside of their protection.
This commit adds the "memory" clobber to the inline assembly accessing the
interrupt control registers. This makes those accesses explicit compiler memory
barriers. The machine code generated without LTO enabled should not differ in
any way by this commit. But the use of irq_*() should now be safe with LTO.
