Add a fucntion to switch between LDO and Buck concerter to provide the
internal CPU voltage.
The Buck Converter is not compatible with internal fast oscillators (DFLL, DPLL)
and requires an inductivity to be present on the board.
When changing the clock configuration while the RTC is running, the
RTC may end up in an undefined state that leaves it unresponsive.
The RTC is not reset to stay persistent across reboots/hibernate, so
it will not be reset on init.
Instead, disable the RTC while configuring the clocks, rtc_init() will
take care of re-enabling it.
@dylad introduced this workaround for saml21, samd5x needs it too.
To reproduce, set the CLOCK_CORECLOCK of a samd5x board (e.g. same54-xpro)
to 48 MHz.
Run any RTC application. The CPU will be stuck in _wait_syncbusy() after
a reboot.
This patch will fix this. (You will need to power-cycle the board if the
RTC has entered the stuck state as it will never be reset.)
Due to stability reasons, the SoftAP interface of the WiFi module was always enabled in former versions even if only the station interface was used. Therefore the WiFi modem had to be always active and the SoC could not enter the modem sleep mode. Therefore, the SoftAP interface is only enabled when ESP-NOW is used.
The test for the line cancellation (ctrl-c) functionality was unable to
detect error because of the way pexpect matches output.
While working on the long line shell bug, a regression was about to be
introduced because of this. This commit fixes the test by directly reading from
the child process and expects an exact response.
Co-authored-by: Juan Carrano <j.carrano@fu-berlin.de>
The numeric value for EOF is -1. This caused the shell to return
the same code when EOF was encountered and when the line lenght was
exceeded. Additionally, if the line length is exceeded, the correct
behaviour is to consume the remaining characters until the end of
the line, to prevent the following line from containing (potentially
dangerous) garbage.
Co-authored-by: Hendrik van Essen <hendrik.ve@fu-berlin.de>
When the radio is in DEEP SLEEP, reading the state register will return 0.
This makes the reset routine abort early even though the device is connected
and still waking up.
Instead, just add a timeout to the polling of the WAKEUP IRQ bit.
In practise it has shown that the loop will be taken two times on 'normal'
reset and four times when the radio was in DEEP SLEEP.
Polling 255 times sure does not hurt.
To reproduce the issue, put both interfaces into SLEEP mode,
then reboot the module:
ifconfig 7 set state sleep
ifconfig 8 set state sleep
reboot
When entering a sleep mode, all wake-up sources should first be disabled before the wake-up sources required for the sleep mode are then stepwise enabled again. Otherwise, an wake-up configuration of one sleep mode may affect the wake-up within another sleep mode.
