smlng
692cf96297
doc: fix doxygen grouping of cpu periph drivers
2017-06-26 14:42:11 +02:00
Oleg Hahm
d0316fa7ae
periph timer: remove timer_irq_(en|dis)able
2017-01-14 15:34:53 +01:00
Hauke Petersen
3a00fe8e49
cpus: make use of cortexm_isr_end()
2016-12-21 11:28:46 +01:00
Joakim Nohlgård
2ea2cdc9e1
cpu/samd21: Use {} notation for empty while loops
2016-03-03 16:31:28 +01:00
Hauke Petersen
b11a3ad74b
cpus: adapted timer implementations to API changes
2016-02-29 14:45:00 +01:00
Joakim Nohlgård
4aa21ff5c1
cpu/samd21: Update to match timer_init API change
2016-02-13 21:29:36 +01:00
Joakim Nohlgård
cbaeccdb90
periph/timer: Drop timer_reset
2015-10-17 20:11:03 +02:00
Hauke Petersen
164721657d
cpu/samd21: added cpu clock configuration
...
- choosable between PLL and internal 8MHz osciallator
- configurable to a wide range of frequencies
2015-06-04 11:58:26 +02:00
Joakim Gebart
13832d8e62
everything: Remove filename from @file Doxygen command
2015-05-22 07:34:41 +02:00
Ludwig Ortmann
cec87139a5
core, cpu, drivers, tests: remove trailing space
2015-02-18 13:52:48 +01:00
Troels Hoffmeyer
7124ec6258
samr21: implemented 32 bit hwtimer
2014-12-17 14:44:54 +01:00
Hauke Petersen
e7fbaf3815
cpu: removed NAKED attribute from ISRs
...
- removed the __attribute__((naked)) from ISRs
- removed ISR_ENTER() and ISR_EXIT() macros
Rationale: Cortex-Mx MCUs save registers R0-R4 automatically
on calling ISRs. The naked attribute tells the compiler not
to save any other registers. This is fine, as long as the
code in the ISR is not nested. If nested, it will use also
R4 and R5, which will then lead to currupted registers on
exit of the ISR. Removing the naked will fix this.
2014-10-30 19:33:32 +01:00
Thomas Eichinger
bf256f63a3
samr21-xpro: initial import for the samr21-xpro board
2014-09-25 14:37:47 +02:00
