3 Commits

Author	SHA1	Message	Date
Jue	54e915e40d	cpu/efm32/timer_series2: sync STATUS register ... Make sure the STATUS register has been synced between the different clock domains. Especially the LETIMER needs some time to update the STATUS register after it has been enabled. If the LETIMER is started and stopped with just a short delay, pm_layered gets confused because the timer seems to be inactive ...	2022-10-28 11:34:55 +02:00
Jue	e6d18af3ad	cpu/efm32/timer_series2: fix timer_start() interaction with pm_layered ... The timer hasn't been enabled yet, if the STATUS isn't RUNNING, yet ...	2022-10-28 11:34:55 +02:00
Jue	568448f68c	cpu/efm32/timer: add series 2 periph driver	2022-10-24 23:16:39 +02:00