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Commit Graph

7 Commits

Author SHA1 Message Date
Joakim Nohlgård
de8f0b62d9 kinetis: Handle ADC modules without extra ADICLK divider
Newer CPUs have alternate clock sources on ADICLK=1 instead of Bus/2
2017-07-18 08:39:21 +02:00
Joakim Nohlgård
676df9a0d7 kinetis: Add support for alternate location for ADC1 clock gate 2017-07-18 08:39:21 +02:00
smlng
692cf96297 doc: fix doxygen grouping of cpu periph drivers 2017-06-26 14:42:11 +02:00
Joakim Nohlgård
a63c0a84a6 kinetis: Use bit.h functions 2017-06-09 05:19:13 +02:00
Joakim Nohlgård
c2ccc1bfa0 kinetis: Fix ADC clock computation
The ADC prescaler computation was broken and gave too high ADC clock for
module clocks slower than 32 MHz (the >32 MHz case is already handled
separately)
2016-12-27 17:10:25 +01:00
Hauke Petersen
3990bd84e7 cpu/kinetis_common: reworked ADC driver 2016-03-14 13:06:23 +01:00
Hauke Petersen
5cac36d5b3 cpu/kinetis_common: moved drivers to periph subdir 2016-02-09 16:20:03 +01:00