6 Commits

Author	SHA1	Message	Date
Benjamin Valentin	7b7eb9d17b	cpu/nrf5x: allow multiple I2C and SPI buses on a shared periph	2022-08-30 10:05:34 +02:00
Benjamin Valentin	5129d249e9	cpu/nrf52: add locking for shared peripherals	2022-08-19 15:47:53 +02:00
Bas Stottelaar	ab6188cea3	cpu/*: add missing include of assert.h	2020-10-22 11:13:08 +02:00
Benjamin Valentin	f0e77840dc	cpu/nrf52: spi_twi_irq add workaround for nRF52810 vendor file ... Either nRF52810 should define SPIM_COUNT 2 or nRF52805 should define SPIM_COUNT 1. But as it nRF52805 defines SPIM_COUNT 2 and nRF52810 defines SPIM_COUNT 1 even though both have a single SPI and a single, separate TWI peripheral. Re-define SPIM_COUNT to 2 on nRF52810 as this is the easiest solution.	2020-08-16 23:26:17 +02:00
Benjamin Valentin	ec67798cf0	cpu/nrf52: fix spi_twi_irq for nrf52805/10/11 ... These smaller parts have SPI1 mapped to TWI0 (if SPI1 exists at all).	2020-08-09 21:46:06 +02:00
Koen Zandberg	1139c0737f	nrf52: add common SPI/I2C IRQ code	2020-05-18 19:14:56 +02:00