- Since flash access is shared with CPU2 we resize ROM_LEN
according to CPU2 secure flash memmory area.
- Add assert to prevent unauthorized reads from CPU2 secure
flash area
- EOP bit is cleared by writing 1 to the register.
- Guard EOP bit clear for STM32F2, STM32F4, STM32F7
and STM32L4 EOP bit is only set if EOPIE is enabled.
Since this is not the case for any platform we exclude
it when not needed.
