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Commit Graph

18454 Commits

Author SHA1 Message Date
Peter Kietzmann
6fd4009b89
Merge pull request #8957 from aabadie/pr/cpu/guard_lpc2387
cpu/lpc2387: remove useless periph file guard
2018-06-20 09:06:31 +02:00
Hyungsin
1b7345535c drivers/pulse_counter: make gpio_mode configurable 2018-06-19 14:50:37 -07:00
Josarn
dfde4284e3 uncrustify: special function ISR 2018-06-19 17:37:32 +02:00
Vincent Dupont
26cb3d8953 cpu/stm32f0: make use of CPU_LINE and STM32_FLASHSIZE 2018-06-19 14:31:23 +02:00
Vincent Dupont
e1ce7e5026 cpu/stm32_common: add STM32_FLASHSIZE constant 2018-06-19 14:31:23 +02:00
Vincent Dupont
d6d0f1a851 cpu/stm32f0: add custom CPU_LINE 2018-06-19 14:31:23 +02:00
Vincent Dupont
2e90eda456 cpu/stm32f4: make use of CPU_LINE_ variable 2018-06-19 14:22:48 +02:00
Vincent Dupont
4d7a195d33 cpu/stm32_common: add CPU_LINE_ variable 2018-06-19 14:22:46 +02:00
ba30315f7e boards/b-l072z-lrwan1: enforce CPU reset when connecting with openocd
connect_assert_srst is used to enforce a CPU reset before connecting to
it with openocd. This is useful when debugging on-chip.

For details on openocd reset configuration, see
2018-06-19 13:17:38 +02:00
58067c2e3e boards/b-l072z-lrwan1: enable RTOS support in openocd config 2018-06-19 13:16:05 +02:00
618a65b928 boards/b-l072z-lrwan1: update openocd config
There's no need for trst signal, just srst is enough. Also not using srst_nogate
seems safer.
2018-06-19 13:13:47 +02:00
d49e0d2f79
Merge pull request #9328 from aabadie/pr/sys/auto_init_doc_enh
sys/auto_init: improve documentation
2018-06-19 09:58:29 +02:00
741c8c0c68 sys/auto_init: improve documentation 2018-06-18 13:59:09 +02:00
Gaëtan Harter
acef97aa15
Merge pull request #9243 from cladmi/pr/warning/missing_include_dirs
makefiles/cflags.inc.mk: add -Wmissing-include-dirs flag
2018-06-18 13:13:54 +02:00
Cenk Gündoğan
4219ec9265
Merge pull request #9345 from bergzand/pr/fmt/strnlen
fmt: Add fmt_strnlen function
2018-06-18 11:23:53 +02:00
Cenk Gündoğan
e08fd546cf
Merge pull request #9353 from miri64/gnrc_sixlowpan/opt/rm-pad
gnrc_sixlowpan: fix order of gnrc_sixlowpan_msg_frag_t
2018-06-18 10:59:27 +02:00
Cenk Gündoğan
acb9e4aed2
Merge pull request #9352 from miri64/gnrc_sixlowpan_frag/enh/expose-rbuf
gnrc_sixlowpan_frag: expose (parts of) reassembly buffer
2018-06-18 10:55:13 +02:00
Gaëtan Harter
41105bb23f
pic32prog: add a documentation on how to update PICkit3
To use pic32prog, the PICkit3 must be updated with a scripting mode firmware.
This describes how to do it on Linux using a windows VM (free).
2018-06-18 10:21:37 +02:00
Marian Buschsieweke
1d0f90dcdf
cpu/lpc2387: Various fixes for GPIO driver
- Fixed documentation
- Use bitwise operation instead of multiplication and addition in `GPIO_PIN()`
- Allow GPIOs to be configured as input via `gpio_init()`
- Fixed bugs in `gpio_init_mux`:
    - `0x01 << ((pin & 31) * 2)` was used before to generate the bitmask, but
      this would shift by 62 to the left. Correct is `0x01 << ((pin & 15) * 2)`
      (See [datasheet](https://www.nxp.com/docs/en/user-guide/UM10211.pdf) at
      pages 156ff)
    - Only one of the two bits was cleared previously
- Changed strategy to access GPIO pins:
    - Previous strategy:
        - Set all bits in FIOMASK except the one for the pin to control to
          disable access to them
        - Set/clear/read all pins in the target GPIO port (but access to all but
          the target pin is ignored because of the applied FIOMASK)
    - New strategy:
        - Set/clear/read only the target pin
    - Advantages:
        - Only one access to a GPIO register instead of two
        - Proven approach: Access to GPIOs on lpc2387 is mostly done by
          accessing the GPIO registers directy (e.g. see the sht11 driver).
          Those accesses never touch the FIOMASK register
        - No unwanted side effects: Disabling all but one pin in a GPIO port
          without undoing that seems not to be a good idea
2018-06-18 09:10:25 +02:00
Bas Stottelaar
72b30cb9db boards: slstk3402a: add uart modes 2018-06-17 11:40:41 +02:00
99460669d3
Merge pull request #7786 from kaspar030/add_some_benchmarks
tests: add some benchmarks
2018-06-16 10:18:22 +02:00
3c9eb940d5 tests/bench_thread_yield_pingpong: initial commit 2018-06-15 23:04:54 +02:00
5bf1295836 tests/bench_thread_flags_pingpong: initial commit 2018-06-15 23:04:54 +02:00
94ba420ee3 tests/bench_sched_nop: initial commit 2018-06-15 23:04:54 +02:00
647fa6ba6e tests/bench_mutex_pingpong: initial commit 2018-06-15 23:04:54 +02:00
b9d8f931eb tests/bench_msg_pingpong: initial commit 2018-06-15 23:04:54 +02:00
Joakim Nohlgård
21bc3ca51f
Merge pull request #9360 from gebart/pr/embunit-const
embunit: Const test case names
2018-06-15 17:04:20 +02:00
Ken Bannister
4f8c3b7d18
Merge pull request #9310 from miri64/gcoap/enh/clients-without-response-handlers
gcoap: don't allocate memo for clients without response handlers
2018-06-15 10:28:30 -04:00
69b790038a
Merge pull request #9011 from cladmi/pr/wip/iotlab/useonenode
makefile.iotlab.single: add IoT-LAB testbed support for one node
2018-06-15 16:02:37 +02:00
Gaëtan Harter
7e81f54205
makefile.iotlab.single: add 'info-iotlab-node' target
Add a target to show the value of IOTLAB_NODE. Can be used to get the result of
using IOTLAB_NODE=auto or IOTLAB_NODE=auto-ssh.
2018-06-15 15:37:33 +02:00
Gaëtan Harter
124f9ec9bb
makefile.iotlab.single: check iotlab-node/iotlab-ssh return value
Format the output to be '0' on success and check it with grep.

This makes command fail when they failed on IoT-LAB.
2018-06-15 15:37:29 +02:00
Gaëtan Harter
d900e0a548
makefile.iotlab.single: add auto and auto-ssh modes
Usage:

    make BOARD=iotlab-m3 IOTLAB_NODE=auto-ssh all flash term

Add support to select node number in auto mode
2018-06-15 15:37:25 +02:00
Gaëtan Harter
9d891c7b75
wsn430: IoT-LAB requires the HEXFILE for flashing 2018-06-15 15:37:21 +02:00
Gaëtan Harter
3bba0c5895
makefile.iotlab.single: add IoT-LAB testbed support for one node
Add support to do flash/reset/term on an IoT-LAB node.
It also allow running test using 'testrunner'.

Configuration variables are:

* `IOTLAB_NODE` which should be set to your node url
  * The full url including site to use from your computer `m3-1.grenoble.iot-lab.info`
  * The short url when used on the IoT-LAB frontend `m3-1`
* `IOTLAB_EXP_ID` for your experiment id for flash and reset.
  By default it tries to use your currently running experiment if you have only one
* `IOTLAB_USER`: is read from `${HOME}/.iotlabrc` as saved by `iotlab-auth`
  * It is expected to have run `iotlab-auth` beforehand.
2018-06-15 15:37:18 +02:00
1e3360e1bf
Merge pull request #8269 from haukepetersen/add_pkg_tinycrypt
pkg: add support for the tinycrypt library
2018-06-15 11:08:14 +02:00
17b661b014
Merge pull request #9356 from kaspar030/add_more_stacksize_defines
core: add more stacksize defines
2018-06-15 11:04:20 +02:00
Hauke Petersen
096765ca29 tests: add test for the tinycrypt integration 2018-06-15 10:49:38 +02:00
Hauke Petersen
5220243853 pkg: add support for tinycrypt 2018-06-15 10:49:38 +02:00
Martine Lenders
7af76590ac
Merge pull request #9361 from gebart/pr/gnrc-pktbuf-add-const
gnrc/pktbuf: Const correctness on gnrc_pktbuf_add
2018-06-15 10:11:51 +02:00
Martine Lenders
b03aa528e8 gcoap: don't allocate memo for clients without response handlers 2018-06-15 09:46:50 +02:00
Joakim Nohlgård
8514ff5f15 gnrc/pktbuf: Const correctness on gnrc_pktbuf_add 2018-06-15 00:44:23 +02:00
Joakim Nohlgård
fcae95ca96 embunit: Const test case names 2018-06-15 00:34:33 +02:00
2b1ed99a49 core: add more stacksize defines 2018-06-14 23:29:03 +02:00
Josarn
91359631d5 cpu/atmega_common/thread_arch.c: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
40c1839a8c cpu/atmega_common/periph/uart.c: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
0e491861af cpu/atmega_common/periph/timer.c: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
fe92771372 cpu/atmega_common/include/cpu.h: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
9b631170cb cpu/atmega_common: uncrustified 2018-06-14 21:47:33 +02:00
Josarn
80b02e5268 cpu/atmega_common: exit_isr thread_yield 2018-06-14 21:47:33 +02:00
Martine Lenders
2c9ee62eb0 gnrc_sixlowpan: fix order of gnrc_sixlowpan_msg_frag_t
While working on #9352 I noticed that the order of members in the
`gnrc_sixlowpan_msg_frag_t` struct costs us 4 bytes in RAM due to byte
alignment. This PR fixes the order of members, so they are the most
packed.
2018-06-14 17:35:29 +02:00