5 Commits

Author	SHA1	Message	Date
Sören Tempel	5ef5ab7e4b	Add CPU feature for stack smash protections	2020-01-22 15:59:02 +01:00
Alexandre Abadie	a3706c1f02	cpu/fe310: add cpp feature	2019-12-05 18:27:12 +01:00
Alexandre Abadie	5e301219df	cpu/fe310: provide gpio feature at cpu level	2019-12-05 15:25:26 +01:00
Sebastian Meiling	ea0b5ff0dd	cpu: add missing arch features to fe310 ... Adds arch_32bit and arch_riscv to cpu/fe310 to allow for feature requirements and blacklisting.	2019-10-14 17:40:23 +02:00
kenrabold	7d1d5e77d8	cpu/fe310: add RISC-V cpu FE310 ... New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools	2018-05-29 15:21:45 -07:00