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cpu: stm32f3: use periph_common SPI functions
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@ -3,4 +3,7 @@ export CPU_ARCH = cortex-m4f
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# use hwtimer compatibility module
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USEMODULE += hwtimer_compat
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# includ common periph module
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USEMODULE += periph_common
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include $(RIOTCPU)/Makefile.include.cortexm_common
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@ -79,6 +79,15 @@ typedef enum {
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GPIO_AF15 /**< use alternate function 14 */
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} gpio_af_t;
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/**
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* @brief declare needed generic SPI functions
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* @{
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*/
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#define PERIPH_SPI_NEEDS_TRANSFER_BYTES
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#define PERIPH_SPI_NEEDS_TRANSFER_REG
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#define PERIPH_SPI_NEEDS_TRANSFER_REGS
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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@ -334,62 +334,6 @@ int spi_transfer_byte(spi_t dev, char out, char *in)
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return 1;
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}
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int spi_transfer_bytes(spi_t dev, char *out, char *in, unsigned int length)
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{
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int i, trans_ret, trans_bytes = 0;
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char in_temp;
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for (i = 0; i < length; i++) {
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if (out != NULL) {
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trans_ret = spi_transfer_byte(dev, out[i], &in_temp);
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}
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else {
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trans_ret = spi_transfer_byte(dev, 0, &in_temp);
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}
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if (trans_ret < 0) {
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return -1;
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}
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if (in != NULL) {
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in[i] = in_temp;
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}
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trans_bytes++;
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}
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return trans_bytes++;
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}
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int spi_transfer_reg(spi_t dev, uint8_t reg, char out, char *in)
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{
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int trans_ret;
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trans_ret = spi_transfer_byte(dev, reg, in);
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if (trans_ret < 0) {
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return -1;
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}
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trans_ret = spi_transfer_byte(dev, out, in);
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if (trans_ret < 0) {
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return -1;
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}
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return 1;
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}
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int spi_transfer_regs(spi_t dev, uint8_t reg, char *out, char *in, unsigned int length)
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{
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int trans_ret;
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trans_ret = spi_transfer_byte(dev, reg, in);
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if (trans_ret < 0) {
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return -1;
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}
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trans_ret = spi_transfer_bytes(dev, out, in, length);
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if (trans_ret < 0) {
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return -1;
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}
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return trans_ret;
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}
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void spi_transmission_begin(spi_t dev, char reset_val)
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{
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if (dev < SPI_NUMOF) {
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