From f5a9e084c978fc372f4eb5c51636ee1e57a8a686 Mon Sep 17 00:00:00 2001
From: Marian Buschsieweke <marian.buschsieweke@posteo.net>
Date: Sat, 13 Jan 2024 12:03:15 +0100
Subject: [PATCH] boards/e180-zg120b-tb: add support for OpenOCD

---
 boards/e180-zg120b-tb/Makefile.include | 12 +++++++++++-
 boards/e180-zg120b-tb/dist/openocd.cfg | 10 ++++++++++
 boards/e180-zg120b-tb/doc.txt          | 18 ++++++++++++++++--
 3 files changed, 37 insertions(+), 3 deletions(-)
 create mode 100644 boards/e180-zg120b-tb/dist/openocd.cfg

diff --git a/boards/e180-zg120b-tb/Makefile.include b/boards/e180-zg120b-tb/Makefile.include
index 0621315977..1a3740d49f 100644
--- a/boards/e180-zg120b-tb/Makefile.include
+++ b/boards/e180-zg120b-tb/Makefile.include
@@ -1,4 +1,14 @@
 # setup JLink for flashing
-PROGRAMMER ?= jlink
 JLINK_DEVICE = EFR32MG1BxxxF256
 JLINK_PRE_FLASH = r
+
+# setup OpenOCD for flashing
+PROGRAMMERS_SUPPORTED += openocd
+OPENOCD_DEBUG_ADAPTER ?= stlink
+
+# default to jlink as programmer, but only if JLinkExe is in $PATH
+ifneq (,$(shell which JLinkExe))
+  PROGRAMMER ?= jlink
+else
+  PROGRAMMER ?= openocd
+endif
diff --git a/boards/e180-zg120b-tb/dist/openocd.cfg b/boards/e180-zg120b-tb/dist/openocd.cfg
new file mode 100644
index 0000000000..79da242c7c
--- /dev/null
+++ b/boards/e180-zg120b-tb/dist/openocd.cfg
@@ -0,0 +1,10 @@
+# Set the default reset option in cases where "SRST=none" is not used for make
+if { ![info exists SRST_OPT] } {
+   set SRST_OPT srst_only
+}
+
+reset_config none
+
+source [find target/efm32.cfg]
+
+$_TARGETNAME configure -rtos auto
diff --git a/boards/e180-zg120b-tb/doc.txt b/boards/e180-zg120b-tb/doc.txt
index e9855de423..8641fafedb 100644
--- a/boards/e180-zg120b-tb/doc.txt
+++ b/boards/e180-zg120b-tb/doc.txt
@@ -4,6 +4,8 @@
  * @brief       Support for Ebyte E180-ZG120B-TB Test Board
 
 ## Overview
+![Image of the E180-ZG120B test board](https://www.ebyte.com/Uploadfiles/Picture/2019-12-20/201912201352132348.jpg)
+
 Ebyte E180-ZG120B Test Board is equipped with the EFM32 microcontroller.
 It is specifically designed for low-power applications, having energy-saving
 peripherals, different energy modes and short wake-up times.
@@ -161,8 +163,20 @@ This MCU has extended pin mapping support. Each pin of a peripheral can be
 connected separately to one of the predefined pins for that peripheral.
 
 ## Flashing the device
-To flash, [SEGGER JLink](https://www.segger.com/jlink-software.html) is
-required.
+The board has no integrated programmer/debugger and no bootloader. Hence,
+an external SWD programmer/debugger such as the [SEGGER JLink][prog-jlink]
+or the [ST-Link][prog-stlink] is required. Connect at least the SWDIO, SWCLK,
+and GND to the programmer. If `JLinkExe` is found in `$PATH`, `jlink` is used
+by default for flashing, otherwise `openocd` is the default. When using OpenOCD,
+the `stlink` is the default for `OPENOCD_DEBUG_ADAPTER`; provide a different
+value if you use other hardware.
+
+@note   When flashing with OpenOCD, leave the NRESET pin unconnected. The
+        configuration does a soft reset only to work around an issue attaching
+        with the hardware reset signal.
+
+[prog-jlink]: https://www.segger.com/jlink-software.html
+[prog-stlink]: https://www.aliexpress.com/wholesale?SearchText=stlink
 
 Flashing is supported by RIOT-OS using the command below: