diff --git a/boards/nucleo-f767zi/Makefile b/boards/nucleo-f767zi/Makefile
index 4dd17b1d0c..b32944c106 100644
--- a/boards/nucleo-f767zi/Makefile
+++ b/boards/nucleo-f767zi/Makefile
@@ -2,3 +2,8 @@ MODULE = board
 DIRS = $(RIOTBOARD)/common/nucleo
 
 include $(RIOTBASE)/Makefile.base
+
+ifneq (,$(filter stm32_eth,$(USEMODULE)))
+  $(info Remapping MOSI of SPI_DEV(0) from PA7 to PB5 to solve pin conflict.\
+         (PA7 is also connected to the RMII_DV of the Ethernet Phy.))
+endif
diff --git a/boards/nucleo-f767zi/include/periph_conf.h b/boards/nucleo-f767zi/include/periph_conf.h
index cc47880721..ac2d03a7e7 100644
--- a/boards/nucleo-f767zi/include/periph_conf.h
+++ b/boards/nucleo-f767zi/include/periph_conf.h
@@ -118,7 +118,16 @@ static const uart_conf_t uart_config[] = {
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI1,
+        /* PA7 is the default MOSI pin, as it is required for compatibility with
+         * Arduino(ish) shields. Sadly, it is also connected to the RMII_DV of
+         * Ethernet PHY. We work around this by remapping the MOSI to PB5 when
+         * the on-board Ethernet PHY is used.
+         */
+#ifdef MODULE_PERIPH_ETH
+        .mosi_pin = GPIO_PIN(PORT_B, 5),
+#else
         .mosi_pin = GPIO_PIN(PORT_A, 7),
+#endif
         .miso_pin = GPIO_PIN(PORT_A, 6),
         .sclk_pin = GPIO_PIN(PORT_A, 5),
         .cs_pin   = GPIO_UNDEF,