mirror of
https://github.com/RIOT-OS/RIOT.git
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Merge pull request #4132 from jfischer-phytec-iot/pr@kinetis-ldscript
kinetis_common: use cortexm_common ldscript
This commit is contained in:
commit
f31db0431f
@ -9,10 +9,6 @@ export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
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# CPU depends on the kinetis module, so include it
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# CPU depends on the kinetis module, so include it
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include $(KINETIS_COMMON)Makefile.include
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include $(KINETIS_COMMON)Makefile.include
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export LINKFLAGS += -L$(RIOTCPU)/kinetis_common/ldscripts
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# define the linker script to use for this CPU
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export LINKERSCRIPT = $(CPU_MODEL).ld
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#export the CPU model and architecture
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#export the CPU model and architecture
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MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
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MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
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export CFLAGS += -DCPU_MODEL_$(MODEL)
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export CFLAGS += -DCPU_MODEL_$(MODEL)
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@ -5,8 +5,8 @@ MEMORY
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{
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{
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vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
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vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
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flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
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flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
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flash (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x410
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rom (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x410
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sram (rwx) : ORIGIN = 0x20000000 - 32K, LENGTH = 64K
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ram (rwx) : ORIGIN = 0x20000000 - 32K, LENGTH = 64K
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}
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}
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INCLUDE kinetis.ld
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INCLUDE kinetis.ld
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@ -5,8 +5,8 @@ MEMORY
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{
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{
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vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
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vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
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flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
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flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
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flash (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
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rom (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
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sram (rwx) : ORIGIN = 0x20000000 - 64K, LENGTH = 128K
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ram (rwx) : ORIGIN = 0x20000000 - 64K, LENGTH = 128K
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}
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}
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INCLUDE kinetis.ld
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INCLUDE kinetis.ld
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@ -9,8 +9,6 @@ export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
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# CPU depends on the kinetis module, so include it
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# CPU depends on the kinetis module, so include it
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include $(KINETIS_COMMON)Makefile.include
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include $(KINETIS_COMMON)Makefile.include
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export LINKFLAGS += -L$(RIOTCPU)/kinetis_common/ldscripts
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#export the CPU model
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#export the CPU model
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MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
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MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
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export CFLAGS += -DCPU_MODEL_$(MODEL)
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export CFLAGS += -DCPU_MODEL_$(MODEL)
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@ -4,9 +4,9 @@ OUTPUT_ARCH(arm)
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MEMORY
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MEMORY
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{
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{
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vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
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vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
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flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
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flashsec (rx): ORIGIN = 0x00000400, LENGTH = 0x10
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flash (rx) : ORIGIN = 0x00000410, LENGTH = 1024K - 0x410
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rom (rx) : ORIGIN = 0x00000410, LENGTH = 1024K - 0x410
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sram (rwx) : ORIGIN = 0x1fff0198, LENGTH = 256K-0x198
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ram (rwx) : ORIGIN = 0x1fff0198, LENGTH = 256K-0x198
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}
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}
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INCLUDE kinetis.ld
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INCLUDE kinetis.ld
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@ -1,12 +1,24 @@
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/* RAM limits */
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/*
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__sram_start = ORIGIN(sram);
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* Copyright (C) 2015 PHYTEC Messtechnik GmbH
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__sram_length = LENGTH(sram);
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* Copyright (C) 2015 Eistec AB
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__sram_end = __sram_start + __sram_length;
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/* Define the default stack size for interrupt mode. */
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/**
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STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 2048;
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* @addtogroup cpu_kinetis
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* @{
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RAMVECT_SIZE = DEFINED(RAMVECT_SIZE) ? RAMVECT_SIZE : 0;
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*
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* @file
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* @brief Sections definitions for the Freescale Kinetis MCUs
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*
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* @author Johann Fischer <j.fischer@phytec.de>
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* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
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*
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* @}
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*/
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SECTIONS
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SECTIONS
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{
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{
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@ -31,220 +43,6 @@ SECTIONS
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ASSERT (SIZEOF(.fcfield) == 0x10, "Flash configuration field of invalid size (linker-script error?)")
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ASSERT (SIZEOF(.fcfield) == 0x10, "Flash configuration field of invalid size (linker-script error?)")
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ASSERT (ADDR(.fcfield) == 0x400, "Flash configuration field at invalid position (linker-script error?)")
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ASSERT (ADDR(.fcfield) == 0x400, "Flash configuration field at invalid position (linker-script error?)")
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ASSERT (LOADADDR(.fcfield) == 0x400, "Flash configuration field at invalid position (linker-script error?)")
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ASSERT (LOADADDR(.fcfield) == 0x400, "Flash configuration field at invalid position (linker-script error?)")
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/* Program code 0x410-. */
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.text :
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{
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. = ALIGN(4);
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_text_load = LOADADDR(.text);
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_text_start = .;
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(SORT(.preinit_array.*)))
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* fini data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(4);
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KEEP (*(SORT_NONE(.init)))
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KEEP (*(SORT_NONE(.fini)))
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/* Default ISR handlers */
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KEEP(*(.default_handlers))
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*(.text.unlikely .text.*_unlikely .text.unlikely.*)
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*(.text.exit .text.exit.*)
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*(.text.startup .text.startup.*)
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*(.text.hot .text.hot.*)
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||||||
*(.text .stub .text.* .gnu.linkonce.t.*)
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||||||
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||||||
/* gcc uses crtbegin.o to find the start of
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||||||
the constructors, so we make sure it is
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||||||
first. Because this is a wildcard, it
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doesn't matter if the user does not
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||||||
actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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||||||
doesn't matter which directory crtbegin.o
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is in. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*crtbegin?.o(.ctors))
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KEEP (*crtbeginTS.o(.ctors))
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/* We don't want to include the .ctor section from
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the crtend.o file until after the sorted ctors.
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The .ctor section from the crtend file contains the
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end of ctors marker and it must be last */
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KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*crtbegin.o(.dtors))
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KEEP (*crtbegin?.o(.dtors))
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KEEP (*crtbeginTS.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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. = ALIGN(4);
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_rodata_start = .;
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*(.rodata .rodata* .gnu.linkonce.r.*)
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. = ALIGN(4);
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_rodata_end = .;
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_text_end = .;
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} > flash
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/* The .extab, .exidx sections are used for C++ exception handling */
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > flash
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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||||||
{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > flash
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PROVIDE_HIDDEN (__exidx_end = .);
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||||||
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.eh_frame_hdr :
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{
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*(.eh_frame_hdr)
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} > flash
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.eh_frame : ONLY_IF_RO
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{
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KEEP (*(.eh_frame))
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} > flash
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.gcc_except_table : ONLY_IF_RO
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{
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*(.gcc_except_table .gcc_except_table.*)
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} > flash
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. = ALIGN(4);
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_etext = .;
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/*
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* Allocate space for interrupt vector in RAM
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*/
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.ramvect :
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{
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. = ALIGN(1024);
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_vector_ram_start = .;
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. = _vector_ram_start + RAMVECT_SIZE;
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. = ALIGN(4);
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_vector_ram_end = .;
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} > sram
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||||||
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/* Program data, values stored in flash and loaded upon init. */
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.relocate : AT (_etext)
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{
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. = ALIGN(4);
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_data_load = LOADADDR(.relocate);
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_data_start = .;
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_srelocate = .;
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*(.ramfunc .ramfunc.*);
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*(.data .data.*);
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. = ALIGN(4);
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_erelocate = .;
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_data_end = .;
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||||||
} > sram
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||||||
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/* .bss section, zeroed out during init. */
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.bss (NOLOAD) :
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||||||
{
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. = ALIGN(4);
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_sbss = . ;
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__bss_start = .;
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_szero = .;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = . ;
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__bss_end = .;
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_ezero = .;
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|
||||||
} > sram
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||||||
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/* stack section */
|
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.stack (NOLOAD):
|
|
||||||
{
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||||||
. = ALIGN(8);
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_sstack = .;
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|
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. = . + STACK_SIZE;
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|
||||||
. = ALIGN(8);
|
|
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_estack = .;
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|
||||||
} > sram
|
|
||||||
|
|
||||||
/* heap section */
|
|
||||||
. = ALIGN(8);
|
|
||||||
|
|
||||||
/* end is used by newlib's default sbrk_r implementations to find the start
|
|
||||||
* of the heap */
|
|
||||||
_end = .;
|
|
||||||
__end = .;
|
|
||||||
__end__ = .;
|
|
||||||
PROVIDE(end = .);
|
|
||||||
|
|
||||||
/* _sheap and _eheap is used by RIOT's sbrk_r implementation */
|
|
||||||
_sheap = . ;
|
|
||||||
_eheap = ORIGIN(sram) + LENGTH(sram);
|
|
||||||
|
|
||||||
/* Populate information abour ram size */
|
|
||||||
_sram = ORIGIN(sram);
|
|
||||||
_eram = ORIGIN(sram) + LENGTH(sram);
|
|
||||||
|
|
||||||
/* Any debugging sections */
|
|
||||||
/* Stabs debugging sections. */
|
|
||||||
.stab 0 : { *(.stab) }
|
|
||||||
.stabstr 0 : { *(.stabstr) }
|
|
||||||
.stab.excl 0 : { *(.stab.excl) }
|
|
||||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
|
||||||
.stab.index 0 : { *(.stab.index) }
|
|
||||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
|
||||||
.comment 0 : { *(.comment) }
|
|
||||||
/* DWARF debug sections.
|
|
||||||
Symbols in the DWARF debugging sections are relative to the beginning
|
|
||||||
of the section so we begin them at 0. */
|
|
||||||
/* DWARF 1 */
|
|
||||||
.debug 0 : { *(.debug) }
|
|
||||||
.line 0 : { *(.line) }
|
|
||||||
/* GNU DWARF 1 extensions */
|
|
||||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
|
||||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
|
||||||
/* DWARF 1.1 and DWARF 2 */
|
|
||||||
.debug_aranges 0 : { *(.debug_aranges) }
|
|
||||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
|
||||||
/* DWARF 2 */
|
|
||||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
|
||||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
|
||||||
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
|
|
||||||
.debug_frame 0 : { *(.debug_frame) }
|
|
||||||
.debug_str 0 : { *(.debug_str) }
|
|
||||||
.debug_loc 0 : { *(.debug_loc) }
|
|
||||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
|
||||||
/* SGI/MIPS DWARF 2 extensions */
|
|
||||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
|
||||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
|
||||||
.debug_typenames 0 : { *(.debug_typenames) }
|
|
||||||
.debug_varnames 0 : { *(.debug_varnames) }
|
|
||||||
/* DWARF 3 */
|
|
||||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
|
||||||
.debug_ranges 0 : { *(.debug_ranges) }
|
|
||||||
/* DWARF Extension. */
|
|
||||||
.debug_macro 0 : { *(.debug_macro) }
|
|
||||||
|
|
||||||
/* XXX: what is the purpose of these sections? */
|
|
||||||
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }
|
|
||||||
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
|
|
||||||
/DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
INCLUDE cortexm_base.ld
|
||||||
|
@ -9,10 +9,6 @@ export KINETIS_COMMON = $(RIOTCPU)/kinetis_common/
|
|||||||
# CPU depends on the kinetis module, so include it
|
# CPU depends on the kinetis module, so include it
|
||||||
include $(KINETIS_COMMON)Makefile.include
|
include $(KINETIS_COMMON)Makefile.include
|
||||||
|
|
||||||
export LINKFLAGS += -L$(RIOTCPU)/kinetis_common/ldscripts
|
|
||||||
# define the linker script to use for this CPU
|
|
||||||
export LINKERSCRIPT = $(CPU_MODEL).ld
|
|
||||||
|
|
||||||
#export the CPU model
|
#export the CPU model
|
||||||
MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
|
MODEL = $(shell echo $(CPU_MODEL)|tr 'a-z' 'A-Z')
|
||||||
export CFLAGS += -DCPU_MODEL_$(MODEL)
|
export CFLAGS += -DCPU_MODEL_$(MODEL)
|
||||||
|
@ -4,9 +4,9 @@ OUTPUT_ARCH(arm)
|
|||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
||||||
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
|
flashsec (rx): ORIGIN = 0x00000400, LENGTH = 0x10
|
||||||
flash (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x410
|
rom (rx) : ORIGIN = 0x00000410, LENGTH = 256K - 0x410
|
||||||
sram (rwx) : ORIGIN = 0x1fffc000, LENGTH = 32K
|
ram (rwx) : ORIGIN = 0x1fffc000, LENGTH = 32K
|
||||||
}
|
}
|
||||||
|
|
||||||
INCLUDE kinetis.ld
|
INCLUDE kinetis.ld
|
||||||
|
@ -4,9 +4,9 @@ OUTPUT_ARCH(arm)
|
|||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
||||||
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
|
flashsec (rx): ORIGIN = 0x00000400, LENGTH = 0x10
|
||||||
flash (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
|
rom (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
|
||||||
sram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K
|
ram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K
|
||||||
}
|
}
|
||||||
|
|
||||||
INCLUDE kinetis.ld
|
INCLUDE kinetis.ld
|
||||||
|
@ -4,9 +4,9 @@ OUTPUT_ARCH(arm)
|
|||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
vectors (rx) : ORIGIN = 0x00000000, LENGTH = 0x400
|
||||||
flashsec (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
|
flashsec (rx): ORIGIN = 0x00000400, LENGTH = 0x10
|
||||||
flash (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
|
rom (rx) : ORIGIN = 0x00000410, LENGTH = 512K - 0x410
|
||||||
sram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K
|
ram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 64K
|
||||||
}
|
}
|
||||||
|
|
||||||
INCLUDE kinetis.ld
|
INCLUDE kinetis.ld
|
||||||
|
Loading…
Reference in New Issue
Block a user