mirror of
https://github.com/RIOT-OS/RIOT.git
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cpu/sam0/periph: remove bitfield usage in UART driver
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
This commit is contained in:
Dylan Laduranty
parent
6ccaca1e76
commit
f31ac8a978
@ -82,7 +82,7 @@ static inline void _syncbusy(SercomUsart *dev)
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#ifdef SERCOM_USART_SYNCBUSY_MASK
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while (dev->SYNCBUSY.reg) {}
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#else
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while (dev->STATUS.bit.SYNCBUSY) {}
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while (dev->STATUS.reg & SERCOM_USART_STATUS_SYNCBUSY) {}
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#endif
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}
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@ -92,9 +92,9 @@ static inline void _reset(SercomUsart *dev)
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while (dev->CTRLA.reg & SERCOM_SPI_CTRLA_SWRST) {}
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#ifdef SERCOM_USART_SYNCBUSY_MASK
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while (dev->SYNCBUSY.bit.SWRST) {}
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while (dev->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_SWRST) {}
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#else
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while (dev->STATUS.bit.SYNCBUSY) {}
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while (dev->STATUS.reg & SERCOM_USART_STATUS_SYNCBUSY) {}
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#endif
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}
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@ -187,13 +187,13 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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#if IS_ACTIVE(MODULE_PM_LAYERED) && defined(SAM0_UART_PM_BLOCK)
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/* clear previously blocked power modes */
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if (dev(uart)->CTRLA.bit.ENABLE) {
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if (dev(uart)->CTRLA.reg & SERCOM_USART_CTRLA_ENABLE) {
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/* RX IRQ is enabled */
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if (dev(uart)->INTENSET.bit.RXC) {
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if (dev(uart)->INTENSET.reg & SERCOM_USART_INTENSET_RXC) {
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pm_unblock(SAM0_UART_PM_BLOCK);
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}
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/* data reg empty IRQ is enabled -> sending data was in progress */
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if (dev(uart)->INTENSET.bit.DRE) {
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if (dev(uart)->INTENSET.reg & SERCOM_USART_INTENSET_DRE) {
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pm_unblock(SAM0_UART_PM_BLOCK);
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}
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}
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@ -363,7 +363,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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return;
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}
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if (!dev(uart)->CTRLA.bit.ENABLE) {
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if (!(dev(uart)->CTRLA.reg & SERCOM_USART_CTRLA_ENABLE)) {
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return;
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}
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@ -372,7 +372,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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if (irq_is_in() || __get_PRIMASK()) {
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/* if ring buffer is full free up a spot */
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if (tsrb_full(&uart_tx_rb[uart])) {
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while (!dev(uart)->INTFLAG.bit.DRE) {}
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while (!(dev(uart)->INTFLAG.reg & SERCOM_USART_INTFLAG_DRE)) {}
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dev(uart)->DATA.reg = tsrb_get_one(&uart_tx_rb[uart]);
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}
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tsrb_add_one(&uart_tx_rb[uart], *data);
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@ -386,7 +386,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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/* tsrb_add_one() is blocking the thread. It may happen that
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* the corresponding ISR has turned off DRE IRQs and, thus,
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* unblocked the corresponding power mode. */
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if (!dev(uart)->INTENSET.bit.DRE) {
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if (!(dev(uart)->INTENSET.reg & SERCOM_USART_INTENSET_DRE)) {
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pm_block(SAM0_UART_PM_BLOCK);
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}
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dev(uart)->INTENSET.reg = SERCOM_USART_INTENSET_DRE;
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@ -397,10 +397,10 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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}
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#else
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for (const void* end = data + len; data != end; ++data) {
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while (!dev(uart)->INTFLAG.bit.DRE) {}
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while (!(dev(uart)->INTFLAG.reg & SERCOM_USART_INTFLAG_DRE)) {}
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dev(uart)->DATA.reg = *data;
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}
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while (!dev(uart)->INTFLAG.bit.TXC) {}
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while (!(dev(uart)->INTFLAG.reg & SERCOM_USART_INTFLAG_TXC)) {}
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#endif
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}
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@ -412,13 +412,13 @@ void uart_poweron(uart_t uart)
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unsigned state = irq_disable();
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#if IS_ACTIVE(MODULE_PM_LAYERED) && defined(SAM0_UART_PM_BLOCK)
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/* block required power modes */
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if (!dev(uart)->CTRLA.bit.ENABLE) {
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if (!(dev(uart)->CTRLA.reg & SERCOM_USART_CTRLA_ENABLE)) {
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/* RX IRQ is enabled */
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if (dev(uart)->INTENSET.bit.RXC) {
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if (dev(uart)->INTENSET.reg & SERCOM_USART_INTENSET_RXC) {
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pm_block(SAM0_UART_PM_BLOCK);
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}
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/* data reg empty IRQ is enabled -> sending data was in progress */
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if (dev(uart)->INTENSET.bit.DRE) {
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if (dev(uart)->INTENSET.reg & SERCOM_USART_INTENSET_DRE) {
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pm_block(SAM0_UART_PM_BLOCK);
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}
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}
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@ -435,13 +435,13 @@ void uart_poweroff(uart_t uart)
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unsigned state = irq_disable();
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#if IS_ACTIVE(MODULE_PM_LAYERED) && defined(SAM0_UART_PM_BLOCK)
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/* clear blocked power modes */
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if (dev(uart)->CTRLA.bit.ENABLE) {
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if (dev(uart)->CTRLA.reg & SERCOM_USART_CTRLA_ENABLE) {
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/* RX IRQ is enabled */
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if (dev(uart)->INTENSET.bit.RXC) {
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if (dev(uart)->INTENSET.reg & SERCOM_USART_INTENSET_RXC) {
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pm_unblock(SAM0_UART_PM_BLOCK);
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}
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/* data reg empty IRQ is enabled -> sending data is in progress */
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if (dev(uart)->INTENSET.bit.DRE) {
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if (dev(uart)->INTENSET.reg & SERCOM_USART_INTENSET_DRE) {
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pm_unblock(SAM0_UART_PM_BLOCK);
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}
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}
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@ -461,7 +461,7 @@ bool uart_collision_detected(uart_t uart)
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*/
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_syncbusy(dev(uart));
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bool collision = dev(uart)->STATUS.bit.COLL;
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bool collision = dev(uart)->STATUS.reg & SERCOM_USART_STATUS_COLL;
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dev(uart)->STATUS.reg = SERCOM_USART_STATUS_COLL;
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return collision;
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}
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@ -469,20 +469,20 @@ bool uart_collision_detected(uart_t uart)
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void uart_collision_detect_enable(uart_t uart)
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{
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/* CTRLB is enable protected */
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dev(uart)->CTRLA.bit.ENABLE = 0;
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dev(uart)->CTRLA.reg &= ~SERCOM_USART_CTRLA_ENABLE;
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_syncbusy(dev(uart));
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/* clear stale collision flag */
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dev(uart)->STATUS.reg = SERCOM_USART_STATUS_COLL;
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/* enable collision detection */
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dev(uart)->CTRLB.bit.COLDEN = 1;
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dev(uart)->CTRLB.reg |= SERCOM_USART_CTRLB_COLDEN;
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/* disable RX interrupt */
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dev(uart)->INTENCLR.bit.RXC = 1;
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dev(uart)->INTENCLR.reg = SERCOM_USART_INTENCLR_RXC;
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/* re-enable UART */
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dev(uart)->CTRLA.bit.ENABLE = 1;
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dev(uart)->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
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/* wait for config to be applied */
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_syncbusy(dev(uart));
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@ -491,7 +491,7 @@ void uart_collision_detect_enable(uart_t uart)
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static void _drain_rxbuf(SercomUsart *dev)
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{
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/* clear readback bytes from receive buffer */
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while (dev->INTFLAG.bit.RXC) {
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while (dev->INTFLAG.reg & SERCOM_USART_INTFLAG_RXC) {
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dev->DATA.reg;
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}
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}
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@ -507,13 +507,13 @@ void uart_collision_detect_disable(uart_t uart)
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ctrlb &= ~SERCOM_USART_CTRLB_COLDEN;
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/* CTRLB is enable protected */
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dev(uart)->CTRLA.bit.ENABLE = 0;
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dev(uart)->CTRLA.reg &= ~SERCOM_USART_CTRLA_ENABLE;
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_syncbusy(dev(uart));
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dev(uart)->CTRLB.reg = ctrlb;
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/* re-enable UART */
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dev(uart)->CTRLA.bit.ENABLE = 1;
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dev(uart)->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
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/* wait for config to be applied */
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_syncbusy(dev(uart));
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@ -523,7 +523,7 @@ void uart_collision_detect_disable(uart_t uart)
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/* re-enable RX complete IRQ */
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if (uart_ctx[uart].rx_cb) {
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dev(uart)->INTENSET.bit.RXC = 1;
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dev(uart)->INTENSET.reg = SERCOM_USART_INTENSET_RXC;
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}
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}
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#endif
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@ -546,23 +546,36 @@ int uart_mode(uart_t uart, uart_data_bits_t data_bits, uart_parity_t parity,
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}
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/* Disable UART first to remove write protect */
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dev(uart)->CTRLA.bit.ENABLE = 0;
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dev(uart)->CTRLA.reg &= ~SERCOM_USART_CTRLA_ENABLE;
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_syncbusy(dev(uart));
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dev(uart)->CTRLB.bit.CHSIZE = data_bits;
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uint32_t ctrlb = dev(uart)->CTRLB.reg;
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if (parity == UART_PARITY_NONE) {
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dev(uart)->CTRLA.bit.FORM = 0x0;
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dev(uart)->CTRLA.reg &= ~SERCOM_USART_CTRLA_FORM_Msk;
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}
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else {
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dev(uart)->CTRLA.bit.FORM = 0x1;
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dev(uart)->CTRLB.bit.PMODE = (parity == UART_PARITY_ODD) ? 1 : 0;
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dev(uart)->CTRLA.reg |= SERCOM_USART_CTRLA_FORM(1);
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if (parity == UART_PARITY_ODD) {
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ctrlb |= SERCOM_USART_CTRLB_PMODE;
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}
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else {
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ctrlb &= ~SERCOM_USART_CTRLB_PMODE;
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}
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}
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dev(uart)->CTRLB.bit.SBMODE = (stop_bits == UART_STOP_BITS_1) ? 0 : 1;
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if (stop_bits == UART_STOP_BITS_1) {
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ctrlb &= ~SERCOM_USART_CTRLB_SBMODE;
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}
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else {
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ctrlb |= SERCOM_USART_CTRLB_SBMODE;
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}
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dev(uart)->CTRLB.reg = ((ctrlb & ~SERCOM_USART_CTRLB_CHSIZE_Msk) |
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SERCOM_USART_CTRLB_CHSIZE(data_bits));
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/* Enable UART again */
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dev(uart)->CTRLA.bit.ENABLE = 1;
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dev(uart)->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
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_syncbusy(dev(uart));
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return UART_OK;
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@ -573,7 +586,7 @@ int uart_mode(uart_t uart, uart_data_bits_t data_bits, uart_parity_t parity,
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void uart_rxstart_irq_configure(uart_t uart, uart_rxstart_cb_t cb, void *arg)
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{
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/* CTRLB is enable-proteced */
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dev(uart)->CTRLA.bit.ENABLE = 0;
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dev(uart)->CTRLA.reg &= ~SERCOM_USART_CTRLA_ENABLE;
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/* set start of frame detection enable */
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dev(uart)->CTRLB.reg |= SERCOM_USART_CTRLB_SFDE;
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@ -582,7 +595,7 @@ void uart_rxstart_irq_configure(uart_t uart, uart_rxstart_cb_t cb, void *arg)
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uart_ctx[uart].rxs_arg = arg;
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/* enable UART again */
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dev(uart)->CTRLA.bit.ENABLE = 1;
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dev(uart)->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
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}
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void uart_rxstart_irq_enable(uart_t uart)
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@ -628,13 +641,15 @@ static inline void irq_handler(unsigned uartnum)
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dev(uartnum)->INTFLAG.reg = status & ~SERCOM_USART_INTFLAG_TXC;
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#if !defined(UART_HAS_TX_ISR) && defined(MODULE_PERIPH_UART_NONBLOCKING)
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if ((status & SERCOM_USART_INTFLAG_DRE) && dev(uartnum)->INTENSET.bit.DRE) {
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if ((status & SERCOM_USART_INTFLAG_DRE) &&
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(dev(uartnum)->INTENSET.reg & SERCOM_USART_INTENSET_DRE)) {
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irq_handler_tx(uartnum);
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}
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#endif
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#ifdef MODULE_PERIPH_UART_RXSTART_IRQ
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if (status & SERCOM_USART_INTFLAG_RXS && dev(uartnum)->INTENSET.bit.RXS) {
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if ((status & SERCOM_USART_INTFLAG_RXS) &&
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(dev(uartnum)->INTENSET.reg & SERCOM_USART_INTENSET_RXS)) {
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uart_ctx[uartnum].rxs_cb(uart_ctx[uartnum].rxs_arg);
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}
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#endif
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