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cpu/msp430fxyz: Fix DCO calibration for MSP430F2xx
The MSP430F2xx family has on RSEL bit more than the MSP430x1xxx family. This updates the clock calibration accordingly.
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@ -30,7 +30,13 @@
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#include "periph_conf.h"
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#include "periph_conf.h"
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#include "periph_cpu.h"
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#include "periph_cpu.h"
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#ifdef RSEL3
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#define RSEL_MASK (RSEL0 | RSEL1 | RSEL2 | RSEL3)
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#define HAS_RSEL3 1
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#else
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#define RSEL_MASK (RSEL0 | RSEL1 | RSEL2)
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#define RSEL_MASK (RSEL0 | RSEL1 | RSEL2)
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#define HAS_RSEL3 0
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#endif
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uint32_t msp430_fxyz_dco_freq;
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uint32_t msp430_fxyz_dco_freq;
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@ -188,7 +194,13 @@ static void calibrate_dco(void)
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uint8_t bcsctl1 = BCSCTL1 & ~(RSEL_MASK);
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uint8_t bcsctl1 = BCSCTL1 & ~(RSEL_MASK);
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uint8_t rselx = 0;
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uint8_t rselx = 0;
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for (uint8_t iter = 0x04; iter != 0; iter >>= 1) {
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/*
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* Note: For MSP430F2xx (HAS_RSEL3 == 1) the bit in RSEL3 is actually
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* ignored if an external resistor is used for the DCO. Still, setting
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* it won't hurt */
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const uint8_t rsel_max_bit = (HAS_RSEL3) ? BIT3 : BIT2;
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for (uint8_t iter = rsel_max_bit; iter != 0; iter >>= 1) {
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BCSCTL1 = bcsctl1 | rselx | iter;
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BCSCTL1 = bcsctl1 | rselx | iter;
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/* busy wait for timer to capture */
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/* busy wait for timer to capture */
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