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mtd_spi_nor: remove sleep when waiting for write completed
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@ -44,15 +44,27 @@
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#define TRACE(...)
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#endif
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#ifndef MTD_SPI_NOR_WRITE_WAIT_US
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#define MTD_SPI_NOR_WRITE_WAIT_US (50 * US_PER_MS)
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#endif
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#define MTD_32K (32768ul)
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#define MTD_32K_ADDR_MASK (0x7FFF)
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#define MTD_4K (4096ul)
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#define MTD_4K_ADDR_MASK (0xFFF)
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#ifndef MTD_SPI_NOR_WAIT_C_ER
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#define MTD_SPI_NOR_WAIT_C_ER (16 * US_PER_SEC)
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#endif
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#ifndef MTD_SPI_NOR_WAIT_S_ER
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#define MTD_SPI_NOR_WAIT_S_ER (40 * US_PER_MS)
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#endif
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#ifndef MTD_SPI_NOR_WAIT_32K_ER
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#define MTD_SPI_NOR_WAIT_32K_ER (20 * US_PER_MS)
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#endif
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#ifndef MTD_SPI_NOR_WAIT_4K_ER
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#define MTD_SPI_NOR_WAIT_4K_ER (10 * US_PER_MS)
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#endif
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static int mtd_spi_nor_init(mtd_dev_t *mtd);
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static int mtd_spi_nor_read(mtd_dev_t *mtd, void *dest, uint32_t addr, uint32_t size);
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static int mtd_spi_nor_write(mtd_dev_t *mtd, const void *src, uint32_t addr, uint32_t size);
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@ -256,8 +268,10 @@ static int mtd_spi_read_jedec_id(const mtd_spi_nor_t *dev, mtd_jedec_id_t *out)
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return status;
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}
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static inline void wait_for_write_complete(const mtd_spi_nor_t *dev)
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static inline void wait_for_write_complete(const mtd_spi_nor_t *dev, uint32_t us)
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{
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unsigned i = 0, j = 0;
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uint32_t div = 2;
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do {
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uint8_t status;
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mtd_spi_cmd_read(dev, dev->opcode->rdsr, &status, sizeof(status));
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@ -266,12 +280,31 @@ static inline void wait_for_write_complete(const mtd_spi_nor_t *dev)
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if ((status & 1) == 0) { /* TODO magic number */
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break;
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}
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i++;
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#if MODULE_XTIMER
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xtimer_usleep(MTD_SPI_NOR_WRITE_WAIT_US);
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if (us) {
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xtimer_usleep(us);
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/* reduce the waiting time quickly if the estimate was too short,
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* but still avoid busy (yield) waiting */
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if (us > 2 * XTIMER_BACKOFF) {
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us -= (us / div);
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div++;
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}
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else {
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us = 2 * XTIMER_BACKOFF;
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}
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}
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else {
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j++;
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thread_yield();
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}
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#else
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(void)div;
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(void) us;
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thread_yield();
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#endif
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} while (1);
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DEBUG("wait loop %u times, yield %u times\n", i, j);
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}
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static int mtd_spi_nor_init(mtd_dev_t *mtd)
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@ -414,7 +447,7 @@ static int mtd_spi_nor_write(mtd_dev_t *mtd, const void *src, uint32_t addr, uin
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mtd_spi_cmd_addr_write(dev, dev->opcode->page_program, addr_be, src, size);
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/* waiting for the command to complete before returning */
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wait_for_write_complete(dev);
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wait_for_write_complete(dev, 0);
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spi_release(dev->spi);
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return size;
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@ -446,6 +479,7 @@ static int mtd_spi_nor_erase(mtd_dev_t *mtd, uint32_t addr, uint32_t size)
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spi_acquire(dev->spi, dev->cs, dev->mode, dev->clk);
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while (size) {
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uint32_t us;
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be_uint32_t addr_be = byteorder_htonl(addr);
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/* write enable */
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mtd_spi_cmd(dev, dev->opcode->wren);
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@ -453,6 +487,7 @@ static int mtd_spi_nor_erase(mtd_dev_t *mtd, uint32_t addr, uint32_t size)
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if (size == total_size) {
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mtd_spi_cmd(dev, dev->opcode->chip_erase);
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size -= total_size;
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us = MTD_SPI_NOR_WAIT_C_ER;
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}
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else if ((dev->flag & SPI_NOR_F_SECT_32K) && (size >= MTD_32K) &&
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((addr & MTD_32K_ADDR_MASK) == 0)) {
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@ -460,6 +495,7 @@ static int mtd_spi_nor_erase(mtd_dev_t *mtd, uint32_t addr, uint32_t size)
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mtd_spi_cmd_addr_write(dev, dev->opcode->block_erase_32k, addr_be, NULL, 0);
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addr += MTD_32K;
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size -= MTD_32K;
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us = MTD_SPI_NOR_WAIT_32K_ER;
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}
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else if ((dev->flag & SPI_NOR_F_SECT_4K) && (size >= MTD_4K) &&
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((addr & MTD_4K_ADDR_MASK) == 0)) {
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@ -467,15 +503,17 @@ static int mtd_spi_nor_erase(mtd_dev_t *mtd, uint32_t addr, uint32_t size)
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mtd_spi_cmd_addr_write(dev, dev->opcode->sector_erase, addr_be, NULL, 0);
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addr += MTD_4K;
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size -= MTD_4K;
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us = MTD_SPI_NOR_WAIT_4K_ER;
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}
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else {
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mtd_spi_cmd_addr_write(dev, dev->opcode->block_erase, addr_be, NULL, 0);
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addr += sector_size;
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size -= sector_size;
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us = MTD_SPI_NOR_WAIT_S_ER;
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}
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/* waiting for the command to complete before continuing */
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wait_for_write_complete(dev);
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wait_for_write_complete(dev, us);
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}
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spi_release(dev->spi);
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