From f000ab67a33d0767f13d2931c62c9ed1b6e31263 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Tue, 13 Oct 2020 09:50:38 +0200 Subject: [PATCH] boards/nucleo-l011k4: add support --- boards/nucleo-l011k4/Kconfig | 26 +++++ boards/nucleo-l011k4/Makefile | 4 + boards/nucleo-l011k4/Makefile.dep | 5 + boards/nucleo-l011k4/Makefile.features | 14 +++ boards/nucleo-l011k4/Makefile.include | 5 + boards/nucleo-l011k4/doc.txt | 5 + boards/nucleo-l011k4/include/periph_conf.h | 106 +++++++++++++++++++++ 7 files changed, 165 insertions(+) create mode 100644 boards/nucleo-l011k4/Kconfig create mode 100644 boards/nucleo-l011k4/Makefile create mode 100644 boards/nucleo-l011k4/Makefile.dep create mode 100644 boards/nucleo-l011k4/Makefile.features create mode 100644 boards/nucleo-l011k4/Makefile.include create mode 100644 boards/nucleo-l011k4/doc.txt create mode 100644 boards/nucleo-l011k4/include/periph_conf.h diff --git a/boards/nucleo-l011k4/Kconfig b/boards/nucleo-l011k4/Kconfig new file mode 100644 index 0000000000..46725d0e02 --- /dev/null +++ b/boards/nucleo-l011k4/Kconfig @@ -0,0 +1,26 @@ +# Copyright (c) 2020 Inria +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. +# + +config BOARD + default "nucleo-l011k4" if BOARD_NUCLEO_L011K4 + +config BOARD_NUCLEO_L011K4 + bool + default y + select BOARD_COMMON_NUCLEO32 + select CPU_MODEL_STM32L011K4 + + # Put defined MCU peripherals here (in alphabetical order) + select HAS_PERIPH_ADC + select HAS_PERIPH_I2C + select HAS_PERIPH_RTC + select HAS_PERIPH_RTT + select HAS_PERIPH_SPI + select HAS_PERIPH_TIMER + select HAS_PERIPH_UART + +source "$(RIOTBOARD)/common/nucleo32/Kconfig" diff --git a/boards/nucleo-l011k4/Makefile b/boards/nucleo-l011k4/Makefile new file mode 100644 index 0000000000..4dd17b1d0c --- /dev/null +++ b/boards/nucleo-l011k4/Makefile @@ -0,0 +1,4 @@ +MODULE = board +DIRS = $(RIOTBOARD)/common/nucleo + +include $(RIOTBASE)/Makefile.base diff --git a/boards/nucleo-l011k4/Makefile.dep b/boards/nucleo-l011k4/Makefile.dep new file mode 100644 index 0000000000..ef8cfa7e73 --- /dev/null +++ b/boards/nucleo-l011k4/Makefile.dep @@ -0,0 +1,5 @@ +# Use Picolibc to reduce ROM usage +USEMODULE += picolibc +FEATURES_REQUIRED += picolibc + +include $(RIOTBOARD)/common/nucleo/Makefile.dep diff --git a/boards/nucleo-l011k4/Makefile.features b/boards/nucleo-l011k4/Makefile.features new file mode 100644 index 0000000000..2ae21bf198 --- /dev/null +++ b/boards/nucleo-l011k4/Makefile.features @@ -0,0 +1,14 @@ +CPU = stm32 +CPU_MODEL = stm32l011k4 + +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_i2c +FEATURES_PROVIDED += periph_rtc +FEATURES_PROVIDED += periph_rtt +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart + +# load the common Makefile.features for Nucleo-32 boards +include $(RIOTBOARD)/common/nucleo32/Makefile.features diff --git a/boards/nucleo-l011k4/Makefile.include b/boards/nucleo-l011k4/Makefile.include new file mode 100644 index 0000000000..fd7d3b1962 --- /dev/null +++ b/boards/nucleo-l011k4/Makefile.include @@ -0,0 +1,5 @@ +# load the common Makefile.include for Nucleo-32 boards +include $(RIOTBOARD)/common/nucleo32/Makefile.include + +# Reduce default thread stack size so that it fits in the only 2kB of RAM +CFLAGS += -DTHREAD_STACKSIZE_DEFAULT=512 diff --git a/boards/nucleo-l011k4/doc.txt b/boards/nucleo-l011k4/doc.txt new file mode 100644 index 0000000000..404acc414f --- /dev/null +++ b/boards/nucleo-l011k4/doc.txt @@ -0,0 +1,5 @@ +/** +@defgroup boards_nucleo-l011k4 STM32 Nucleo-L011K4 +@ingroup boards_common_nucleo32 +@brief Support for the STM32 Nucleo-L011K4 + */ diff --git a/boards/nucleo-l011k4/include/periph_conf.h b/boards/nucleo-l011k4/include/periph_conf.h new file mode 100644 index 0000000000..003b62d647 --- /dev/null +++ b/boards/nucleo-l011k4/include/periph_conf.h @@ -0,0 +1,106 @@ +/* + * Copyright (C) 2020 Inria + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_nucleo-l011k4 + * @{ + * + * @file + * @brief Peripheral MCU configuration for the nucleo-l011k4 board + * + * @author Alexandre Aabdie + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +/* Add specific clock configuration (HSE, LSE) for this board here */ +#ifndef CONFIG_BOARD_HAS_LSE +#define CONFIG_BOARD_HAS_LSE 1 +#endif + +#include "periph_cpu.h" +#include "l0l1/cfg_clock_default.h" +#include "cfg_i2c1_pb6_pb7.h" +#include "cfg_rtt_default.h" +#include "cfg_timer_tim2.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = USART2, + .rcc_mask = RCC_APB1ENR_USART2EN, + .rx_pin = GPIO_PIN(PORT_A, 15), + .tx_pin = GPIO_PIN(PORT_A, 2), + .rx_af = GPIO_AF4, + .tx_af = GPIO_AF4, + .bus = APB1, + .irqn = USART2_IRQn, + .type = STM32_USART, + .clk_src = 0, /* Use APB clock */ + } +}; + +#define UART_0_ISR (isr_usart2) + +#define UART_NUMOF ARRAY_SIZE(uart_config) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +static const spi_conf_t spi_config[] = { + { + .dev = SPI1, + .mosi_pin = GPIO_PIN(PORT_B, 5), + .miso_pin = GPIO_PIN(PORT_B, 4), + .sclk_pin = GPIO_PIN(PORT_B, 3), + .cs_pin = GPIO_UNDEF, + .mosi_af = GPIO_AF0, + .miso_af = GPIO_AF0, + .sclk_af = GPIO_AF0, + .cs_af = GPIO_AF0, + .rccmask = RCC_APB2ENR_SPI1EN, + .apbbus = APB2 + } +}; + +#define SPI_NUMOF ARRAY_SIZE(spi_config) +/** @} */ + +/** + * @name ADC configuration + * @{ + */ +static const adc_conf_t adc_config[] = { + { GPIO_PIN(PORT_A, 0), 0 }, /* Pin A0 */ + { GPIO_PIN(PORT_A, 1), 1 }, /* Pin A1 */ + { GPIO_PIN(PORT_A, 3), 3 }, /* Pin A2 */ + { GPIO_PIN(PORT_A, 4), 4 }, /* Pin A3 */ + { GPIO_PIN(PORT_A, 5), 5 }, /* Pin A4 */ + { GPIO_PIN(PORT_A, 6), 6 }, /* Pin A5 */ + { GPIO_PIN(PORT_A, 7), 7 }, /* Pin A6 */ +}; + +#define ADC_NUMOF ARRAY_SIZE(adc_config) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */