Merge pull request #14998 from aabadie/pr/cpu/stm32_lines

cpu/stm32: model CPU lines in Kconfig + small refactoring

cpu/stm32/Kconfig

@@ -17,386 +17,9 @@ config CPU_STM32
     select HAS_PERIPH_UART_NONBLOCKING
     select HAS_PERIPH_WDT
 
-config CPU_FAM_F0
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M0
-    select HAS_CPU_STM32F0
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-
-config CPU_FAM_F1
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M3
-    select HAS_CPU_STM32F1
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-
-config CPU_FAM_F2
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M3
-    select HAS_CPU_STM32F2
-    select HAS_CORTEXM_MPU
-    select HAS_PERIPH_HWRNG
-
-config CPU_FAM_F3
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M4F
-    select HAS_CPU_STM32F3
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-
-config CPU_FAM_F4
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M4F
-    select HAS_CPU_STM32F4
-    select HAS_CORTEXM_MPU
-
-config CPU_FAM_F7
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M7
-    select HAS_CPU_STM32F7
-    select HAS_CORTEXM_MPU
-    select HAS_PERIPH_HWRNG
-
-config CPU_FAM_G0
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M0PLUS
-    select HAS_CPU_STM32G0
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-
-config CPU_FAM_G4
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M4
-    select HAS_CPU_STM32G4
-    select HAS_CORTEXM_MPU
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-    select HAS_PERIPH_HWRNG
-
-config CPU_FAM_L0
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M0PLUS
-    select HAS_CPU_STM32L0
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-    select HAS_PERIPH_EEPROM
-
-config CPU_FAM_L1
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M3
-    select HAS_CPU_STM32L1
-    select HAS_CORTEXM_MPU
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-    select HAS_PERIPH_EEPROM
-
-config CPU_FAM_L4
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M4F
-    select HAS_CPU_STM32L4
-    select HAS_CORTEXM_MPU
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-    select HAS_PERIPH_HWRNG
-
-config CPU_FAM_WB
-    bool
-    select CPU_STM32
-    select CPU_CORE_CORTEX_M4
-    select HAS_CPU_STM32WB
-    select HAS_PERIPH_FLASHPAGE
-    select HAS_PERIPH_FLASHPAGE_RAW
-    select HAS_PERIPH_HWRNG
-
-# CPU Models
-
-# STM32F0
-config CPU_MODEL_STM32F030F4
-    bool
-    select CPU_FAM_F0
-
-config CPU_MODEL_STM32F030R8
-    bool
-    select CPU_FAM_F0
-
-config CPU_MODEL_STM32F031K6
-    bool
-    select CPU_FAM_F0
-
-config CPU_MODEL_STM32F042K6
-    bool
-    select CPU_FAM_F0
-
-config CPU_MODEL_STM32F051R8
-    bool
-    select CPU_FAM_F0
-
-config CPU_MODEL_STM32F070RB
-    bool
-    select CPU_FAM_F0
-
-config CPU_MODEL_STM32F072RB
-    bool
-    select CPU_FAM_F0
-
-config CPU_MODEL_STM32F091RC
-    bool
-    select CPU_FAM_F0
-
-# STM32F1
-config CPU_MODEL_STM32F103C8
-    bool
-    select CPU_FAM_F1
-
-config CPU_MODEL_STM32F103CB
-    bool
-    select CPU_FAM_F1
-
-config CPU_MODEL_STM32F103RB
-    bool
-    select CPU_FAM_F1
-
-config CPU_MODEL_STM32F103RE
-    bool
-    select CPU_FAM_F1
-
-# STM32F2
-config CPU_MODEL_STM32F207ZG
-    bool
-    select CPU_FAM_F2
-
-# STM32F3
-config CPU_MODEL_STM32F302R8
-    bool
-    select CPU_FAM_F3
-
-config CPU_MODEL_STM32F303K8
-    bool
-    select CPU_FAM_F3
-
-config CPU_MODEL_STM32F303RE
-    bool
-    select CPU_FAM_F3
-    select HAS_CORTEXM_MPU
-
-config CPU_MODEL_STM32F303VC
-    bool
-    select CPU_FAM_F3
-    select HAS_CORTEXM_MPU
-
-config CPU_MODEL_STM32F303ZE
-    bool
-    select CPU_FAM_F3
-    select HAS_CORTEXM_MPU
-
-config CPU_MODEL_STM32F334R8
-    bool
-    select CPU_FAM_F3
-
-# STM32F4
-config CPU_MODEL_STM32F401RE
-    bool
-    select CPU_FAM_F4
-
-config CPU_MODEL_STM32F405RG
-    bool
-    select CPU_FAM_F4
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32F407VG
-    bool
-    select CPU_FAM_F4
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32F410RB
-    bool
-    select CPU_FAM_F4
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32F411RE
-    bool
-    select CPU_FAM_F4
-
-config CPU_MODEL_STM32F411CEU6
-    bool
-    select CPU_FAM_F4
-
-config CPU_MODEL_STM32F412ZG
-    bool
-    select CPU_FAM_F4
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32F413ZH
-    bool
-    select CPU_FAM_F4
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32F415RG
-    bool
-    select CPU_FAM_F4
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32F429ZI
-    bool
-    select CPU_FAM_F4
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32F437VG
-    bool
-    select CPU_FAM_F4
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32F446RE
-    bool
-    select CPU_FAM_F4
-
-config CPU_MODEL_STM32F446ZE
-    bool
-    select CPU_FAM_F4
-
-# STM32F7
-config CPU_MODEL_STM32F722ZE
-    bool
-    select CPU_FAM_F7
-
-config CPU_MODEL_STM32F723IE
-    bool
-    select CPU_FAM_F7
-
-config CPU_MODEL_STM32F746ZG
-    bool
-    select CPU_FAM_F7
-
-config CPU_MODEL_STM32F767ZI
-    bool
-    select CPU_FAM_F7
-
-config CPU_MODEL_STM32F769NI
-    bool
-    select CPU_FAM_F7
-
-# STM32G0
-config CPU_MODEL_STM32G070RB
-    bool
-    select CPU_FAM_G0
-
-config CPU_MODEL_STM32G071RB
-    bool
-    select CPU_FAM_G0
-
-# STM32G4
-config CPU_MODEL_STM32G431RB
-    bool
-    select CPU_FAM_G4
-
-config CPU_MODEL_STM32G474RE
-    bool
-    select CPU_FAM_G4
-
-# STM32L0
-config CPU_MODEL_STM32L031K6
-    bool
-    select CPU_FAM_L0
-
-config CPU_MODEL_STM32L052T8
-    bool
-    select CPU_FAM_L0
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32L053R8
-    bool
-    select CPU_FAM_L0
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32L053C8
-    bool
-    select CPU_FAM_L0
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32L072CZ
-    bool
-    select CPU_FAM_L0
-    select HAS_PERIPH_HWRNG
-
-config CPU_MODEL_STM32L073RZ
-    bool
-    select CPU_FAM_L0
-    select HAS_PERIPH_HWRNG
-
-# STM32L1
-config CPU_MODEL_STM32L151CB
-    bool
-    select CPU_FAM_L1
-
-config CPU_MODEL_STM32L151CB_A
-    bool
-    select CPU_FAM_L1
-
-config CPU_MODEL_STM32L151RC
-    bool
-    select CPU_FAM_L1
-
-config CPU_MODEL_STM32L152RE
-    bool
-    select CPU_FAM_L1
-
-# STM32L4
-config CPU_MODEL_STM32L412KB
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L432KC
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L433RC
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L452RE
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L475VG
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L476RG
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L476VG
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L496AG
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L496ZG
-    bool
-    select CPU_FAM_L4
-
-config CPU_MODEL_STM32L4R5ZI
-    bool
-    select CPU_FAM_L4
-
-# STM32WB
-config CPU_MODEL_STM32WB55RG
-    bool
-    select CPU_FAM_WB
+# Common CPU symbol
+config CPU
+    default "stm32" if CPU_STM32
 
 # Definition of specific features
 config HAS_CPU_STM32
@@ -404,174 +27,12 @@ config HAS_CPU_STM32
     help
         Indicates that a 'stm32' cpu is being used.
 
-config HAS_CPU_STM32F0
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32f0' family.
-
-config HAS_CPU_STM32F1
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32f1' family.
-
-config HAS_CPU_STM32F2
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32f2' family.
-
-config HAS_CPU_STM32F3
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32f3' family.
-
-config HAS_CPU_STM32F4
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32f4' family.
-
-config HAS_CPU_STM32F7
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32f7' family.
-
-config HAS_CPU_STM32G0
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32g0' family.
-
-config HAS_CPU_STM32G4
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32g4' family.
-
-config HAS_CPU_STM32L0
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32l0' family.
-
-config HAS_CPU_STM32L1
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32l1' family.
-
-config HAS_CPU_STM32L4
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32l4' family.
-
-config HAS_CPU_STM32WB
-    bool
-    help
-        Indicates that the cpu being used belongs to the 'stm32wb' family.
-
 config HAS_BOOTLOADER_STM32
     bool
     help
         Indicates that the stm32 bootloader is being used.
 
-# Common CPU symbols
-config CPU_FAM
-    default "f0" if CPU_FAM_F0
-    default "f1" if CPU_FAM_F1
-    default "f2" if CPU_FAM_F2
-    default "f3" if CPU_FAM_F3
-    default "f4" if CPU_FAM_F4
-    default "f7" if CPU_FAM_F7
-    default "g0" if CPU_FAM_G0
-    default "g4" if CPU_FAM_G4
-    default "l0" if CPU_FAM_L0
-    default "l1" if CPU_FAM_L1
-    default "l4" if CPU_FAM_L4
-    default "wb" if CPU_FAM_WB
-
-config CPU_MODEL
-    # STM32F0
-    default "stm32f030f4" if CPU_MODEL_STM32F030F4
-    default "stm32f030r8" if CPU_MODEL_STM32F030R8
-    default "stm32f031k6" if CPU_MODEL_STM32F031K6
-    default "stm32f042k6" if CPU_MODEL_STM32F042K6
-    default "stm32f051r8" if CPU_MODEL_STM32F051R8
-    default "stm32f070rb" if CPU_MODEL_STM32F070RB
-    default "stm32f072rb" if CPU_MODEL_STM32F072RB
-    default "stm32f091rc" if CPU_MODEL_STM32F091RC
-
-    # STM32F1
-    default "stm32f103c8" if CPU_MODEL_STM32F103C8
-    default "stm32f103cb" if CPU_MODEL_STM32F103CB
-    default "stm32f103rb" if CPU_MODEL_STM32F103RB
-    default "stm32f103re" if CPU_MODEL_STM32F103RE
-
-    # STM32F2
-    default "stm32f207zg" if CPU_MODEL_STM32F207ZG
-
-    # STM32F3
-    default "stm32f302r8" if CPU_MODEL_STM32F302R8
-    default "stm32f303k8" if CPU_MODEL_STM32F303K8
-    default "stm32f303re" if CPU_MODEL_STM32F303RE
-    default "stm32f303vc" if CPU_MODEL_STM32F303VC
-    default "stm32f303ze" if CPU_MODEL_STM32F303ZE
-    default "stm32f334r8" if CPU_MODEL_STM32F334R8
-
-    # STM32F4
-    default "stm32f401re" if CPU_MODEL_STM32F401RE
-    default "stm32f405rg" if CPU_MODEL_STM32F405RG
-    default "stm32f407vg" if CPU_MODEL_STM32F407VG
-    default "stm32f410rb" if CPU_MODEL_STM32F410RB
-    default "stm32f411re" if CPU_MODEL_STM32F411RE
-    default "stm32f411ceu6" if CPU_MODEL_STM32F411CEU6
-    default "stm32f412zg" if CPU_MODEL_STM32F412ZG
-    default "stm32f413zh" if CPU_MODEL_STM32F413ZH
-    default "stm32f415rg" if CPU_MODEL_STM32F415RG
-    default "stm32f429zi" if CPU_MODEL_STM32F429ZI
-    default "stm32f437vg" if CPU_MODEL_STM32F437VG
-    default "stm32f446re" if CPU_MODEL_STM32F446RE
-    default "stm32f446ze" if CPU_MODEL_STM32F446ZE
-
-    # STM32F7
-    default "stm32f722ze" if CPU_MODEL_STM32F722ZE
-    default "stm32f723ie" if CPU_MODEL_STM32F723IE
-    default "stm32f746zg" if CPU_MODEL_STM32F746ZG
-    default "stm32f767zi" if CPU_MODEL_STM32F767ZI
-    default "stm32f769ni" if CPU_MODEL_STM32F769NI
-
-    # STM32G0
-    default "stm32g070rb" if CPU_MODEL_STM32G070RB
-    default "stm32g071rb" if CPU_MODEL_STM32G071RB
-
-    # STM32G4
-    default "stm32g431rb" if CPU_MODEL_STM32G431RB
-    default "stm32g474re" if CPU_MODEL_STM32G474RE
-
-    # STM32L0
-    default "stm32l031k6" if CPU_MODEL_STM32L031K6
-    default "stm32l052t8" if CPU_MODEL_STM32L052T8
-    default "stm32l053r8" if CPU_MODEL_STM32L053R8
-    default "stm32l053c8" if CPU_MODEL_STM32L053C8
-    default "stm32l072cz" if CPU_MODEL_STM32L072CZ
-    default "stm32l073rz" if CPU_MODEL_STM32L073RZ
-
-    # STM32L1
-    default "stm32l151cb" if CPU_MODEL_STM32L151CB
-    default "stm32l151cb_a" if CPU_MODEL_STM32L151CB_A
-    default "stm32l151rc" if CPU_MODEL_STM32L151RC
-    default "stm32l152re" if CPU_MODEL_STM32L152RE
-
-    # STM32L4
-    default "stm32l412kb" if CPU_MODEL_STM32L412KB
-    default "stm32l432kc" if CPU_MODEL_STM32L432KC
-    default "stm32l433rc" if CPU_MODEL_STM32L433RC
-    default "stm32l452re" if CPU_MODEL_STM32L452RE
-    default "stm32l475vg" if CPU_MODEL_STM32L475VG
-    default "stm32l476rg" if CPU_MODEL_STM32L476RG
-    default "stm32l476vg" if CPU_MODEL_STM32L476VG
-    default "stm32l496ag" if CPU_MODEL_STM32L496AG
-    default "stm32l496zg" if CPU_MODEL_STM32L496ZG
-    default "stm32l4r5zi" if CPU_MODEL_STM32L4R5ZI
-
-    # STM32WB
-    default "stm32wb55rg" if CPU_MODEL_STM32WB55RG
-
-config CPU
-    default "stm32" if CPU_STM32
-
+orsource "kconfig/*/Kconfig"
+orsource "kconfig/*/Kconfig.lines"
+orsource "kconfig/*/Kconfig.models"
 source "$(RIOTCPU)/cortexm_common/Kconfig"

cpu/stm32/kconfig/f0/Kconfig

@@ -0,0 +1,22 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM
+    default "f0" if CPU_FAM_F0
+
+config CPU_FAM_F0
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M0
+    select HAS_CPU_STM32F0
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+
+config HAS_CPU_STM32F0
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32f0' family.

cpu/stm32/kconfig/f0/Kconfig.lines

@@ -0,0 +1,71 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU Lines
+config CPU_LINE_STM32F030X6
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F030X8
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F030XC
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F031X6
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F038XX
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F042X6
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F048XX
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F051X8
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F058XX
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F070X6
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F070XB
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F071XB
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F072XB
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F078XX
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F091XC
+    bool
+    select CPU_FAM_F0
+
+config CPU_LINE_STM32F098XX
+    bool
+    select CPU_FAM_F0

cpu/stm32/kconfig/f0/Kconfig.models

@@ -0,0 +1,50 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32F030F4
+    bool
+    select CPU_FAM_F0
+
+config CPU_MODEL_STM32F030R8
+    bool
+    select CPU_LINE_STM32F030X8
+
+config CPU_MODEL_STM32F031K6
+    bool
+    select CPU_LINE_STM32F031X6
+
+config CPU_MODEL_STM32F042K6
+    bool
+    select CPU_LINE_STM32F042X6
+
+config CPU_MODEL_STM32F051R8
+    bool
+    select CPU_LINE_STM32F051X8
+
+config CPU_MODEL_STM32F070RB
+    bool
+    select CPU_LINE_STM32F070XB
+
+config CPU_MODEL_STM32F072RB
+    bool
+    select CPU_LINE_STM32F072XB
+
+config CPU_MODEL_STM32F091RC
+    bool
+    select CPU_LINE_STM32F091XC
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32f030f4" if CPU_MODEL_STM32F030F4
+    default "stm32f030r8" if CPU_MODEL_STM32F030R8
+    default "stm32f031k6" if CPU_MODEL_STM32F031K6
+    default "stm32f042k6" if CPU_MODEL_STM32F042K6
+    default "stm32f051r8" if CPU_MODEL_STM32F051R8
+    default "stm32f070rb" if CPU_MODEL_STM32F070RB
+    default "stm32f072rb" if CPU_MODEL_STM32F072RB
+    default "stm32f091rc" if CPU_MODEL_STM32F091RC

cpu/stm32/kconfig/f1/Kconfig

@@ -0,0 +1,22 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_F1
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M3
+    select HAS_CPU_STM32F1
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+
+config CPU_FAM
+    default "f1" if CPU_FAM_F1
+
+config HAS_CPU_STM32F1
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32f1' family.

cpu/stm32/kconfig/f1/Kconfig.lines

@@ -0,0 +1,63 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32F100XB
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F100XE
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F101X6
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F101XB
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F101XE
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F101XG
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F102X6
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F102XB
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F103X6
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F103XB
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F103XE
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F103XG
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F105XC
+    bool
+    select CPU_FAM_F1
+
+config CPU_LINE_STM32F107XC
+    bool
+    select CPU_FAM_F1

cpu/stm32/kconfig/f1/Kconfig.models

@@ -0,0 +1,30 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32F103C8
+    bool
+    select CPU_FAM_F1
+
+config CPU_MODEL_STM32F103CB
+    bool
+    select CPU_LINE_STM32F103XB
+
+config CPU_MODEL_STM32F103RB
+    bool
+    select CPU_LINE_STM32F103XB
+
+config CPU_MODEL_STM32F103RE
+    bool
+    select CPU_LINE_STM32F103XE
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32f103c8" if CPU_MODEL_STM32F103C8
+    default "stm32f103cb" if CPU_MODEL_STM32F103CB
+    default "stm32f103rb" if CPU_MODEL_STM32F103RB
+    default "stm32f103re" if CPU_MODEL_STM32F103RE

cpu/stm32/kconfig/f2/Kconfig

@@ -0,0 +1,22 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_F2
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M3
+    select HAS_CPU_STM32F2
+    select HAS_CORTEXM_MPU
+    select HAS_PERIPH_HWRNG
+
+config CPU_FAM
+    default "f2" if CPU_FAM_F2
+
+config HAS_CPU_STM32F2
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32f2' family.

cpu/stm32/kconfig/f2/Kconfig.lines

@@ -0,0 +1,23 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32F205XX
+    bool
+    select CPU_FAM_F2
+
+config CPU_LINE_STM32F207XX
+    bool
+    select CPU_FAM_F2
+
+config CPU_LINE_STM32F215XX
+    bool
+    select CPU_FAM_F2
+
+config CPU_LINE_STM32F217XX
+    bool
+    select CPU_FAM_F2

cpu/stm32/kconfig/f2/Kconfig.models

@@ -0,0 +1,15 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32F207ZG
+    bool
+    select CPU_LINE_STM32F207XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32f207zg" if CPU_MODEL_STM32F207ZG

cpu/stm32/kconfig/f3/Kconfig

@@ -0,0 +1,22 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_F3
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M4F
+    select HAS_CPU_STM32F3
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+
+config CPU_FAM
+    default "f3" if CPU_FAM_F3
+
+config HAS_CPU_STM32F3
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32f3' family.

cpu/stm32/kconfig/f3/Kconfig.lines

@@ -0,0 +1,65 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32F301X8
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F302X8
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F302XC
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F302XE
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F303X8
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F303XC
+    bool
+    select CPU_FAM_F3
+    select HAS_CORTEXM_MPU
+
+config CPU_LINE_STM32F303XE
+    bool
+    select CPU_FAM_F3
+    select HAS_CORTEXM_MPU
+
+config CPU_LINE_STM32F318XX
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F328XX
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F334X8
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F358XX
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F373XC
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F378XX
+    bool
+    select CPU_FAM_F3
+
+config CPU_LINE_STM32F398XX
+    bool
+    select CPU_FAM_F3

cpu/stm32/kconfig/f3/Kconfig.models

@@ -0,0 +1,40 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32F302R8
+    bool
+    select CPU_LINE_STM32F302X8
+
+config CPU_MODEL_STM32F303K8
+    bool
+    select CPU_LINE_STM32F303X8
+
+config CPU_MODEL_STM32F303RE
+    bool
+    select CPU_LINE_STM32F303XE
+
+config CPU_MODEL_STM32F303VC
+    bool
+    select CPU_LINE_STM32F303XC
+
+config CPU_MODEL_STM32F303ZE
+    bool
+    select CPU_LINE_STM32F303XE
+
+config CPU_MODEL_STM32F334R8
+    bool
+    select CPU_LINE_STM32F334X8
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32f302r8" if CPU_MODEL_STM32F302R8
+    default "stm32f303k8" if CPU_MODEL_STM32F303K8
+    default "stm32f303re" if CPU_MODEL_STM32F303RE
+    default "stm32f303vc" if CPU_MODEL_STM32F303VC
+    default "stm32f303ze" if CPU_MODEL_STM32F303ZE
+    default "stm32f334r8" if CPU_MODEL_STM32F334R8

cpu/stm32/kconfig/f4/Kconfig

@@ -0,0 +1,21 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_F4
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M4F
+    select HAS_CPU_STM32F4
+    select HAS_CORTEXM_MPU
+
+config CPU_FAM
+    default "f4" if CPU_FAM_F4
+
+config HAS_CPU_STM32F4
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32f4' family.

cpu/stm32/kconfig/f4/Kconfig.lines

@@ -0,0 +1,107 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32F401XC
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F401XE
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F405XX
+    bool
+    select CPU_FAM_F4
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32F407XX
+    bool
+    select CPU_FAM_F4
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32F410CX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F410RX
+    bool
+    select CPU_FAM_F4
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32F410TX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F411XE
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F412CX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F412RX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F412VX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F412ZX
+    bool
+    select CPU_FAM_F4
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32F413XX
+    bool
+    select CPU_FAM_F4
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32F415XX
+    bool
+    select CPU_FAM_F4
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32F417XX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F423XX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F427XX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F429XX
+    bool
+    select CPU_FAM_F4
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32F437XX
+    bool
+    select CPU_FAM_F4
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32F439XX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F446XX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F469XX
+    bool
+    select CPU_FAM_F4
+
+config CPU_LINE_STM32F479XX
+    bool
+    select CPU_FAM_F4

cpu/stm32/kconfig/f4/Kconfig.models

@@ -0,0 +1,75 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32F401RE
+    bool
+    select CPU_LINE_STM32F401XE
+
+config CPU_MODEL_STM32F405RG
+    bool
+    select CPU_LINE_STM32F405XX
+
+config CPU_MODEL_STM32F407VG
+    bool
+    select CPU_LINE_STM32F407XX
+
+config CPU_MODEL_STM32F410RB
+    bool
+    select CPU_LINE_STM32F410RX
+
+config CPU_MODEL_STM32F411RE
+    bool
+    select CPU_LINE_STM32F411XE
+
+config CPU_MODEL_STM32F411CEU6
+    bool
+    select CPU_LINE_STM32F411XE
+
+config CPU_MODEL_STM32F412ZG
+    bool
+    select CPU_LINE_STM32F412ZX
+
+config CPU_MODEL_STM32F413ZH
+    bool
+    select CPU_LINE_STM32F413XX
+
+config CPU_MODEL_STM32F415RG
+    bool
+    select CPU_LINE_STM32F415XX
+
+config CPU_MODEL_STM32F429ZI
+    bool
+    select CPU_LINE_STM32F429XX
+
+config CPU_MODEL_STM32F437VG
+    bool
+    select CPU_LINE_STM32F437XX
+
+config CPU_MODEL_STM32F446RE
+    bool
+    select CPU_LINE_STM32F446XX
+
+config CPU_MODEL_STM32F446ZE
+    bool
+    select CPU_LINE_STM32F446XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32f401re" if CPU_MODEL_STM32F401RE
+    default "stm32f405rg" if CPU_MODEL_STM32F405RG
+    default "stm32f407vg" if CPU_MODEL_STM32F407VG
+    default "stm32f410rb" if CPU_MODEL_STM32F410RB
+    default "stm32f411re" if CPU_MODEL_STM32F411RE
+    default "stm32f411ceu6" if CPU_MODEL_STM32F411CEU6
+    default "stm32f412zg" if CPU_MODEL_STM32F412ZG
+    default "stm32f413zh" if CPU_MODEL_STM32F413ZH
+    default "stm32f415rg" if CPU_MODEL_STM32F415RG
+    default "stm32f429zi" if CPU_MODEL_STM32F429ZI
+    default "stm32f437vg" if CPU_MODEL_STM32F437VG
+    default "stm32f446re" if CPU_MODEL_STM32F446RE
+    default "stm32f446ze" if CPU_MODEL_STM32F446ZE

cpu/stm32/kconfig/f7/Kconfig

@@ -0,0 +1,22 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_F7
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M7
+    select HAS_CPU_STM32F7
+    select HAS_CORTEXM_MPU
+    select HAS_PERIPH_HWRNG
+
+config CPU_FAM
+    default "f7" if CPU_FAM_F7
+
+config HAS_CPU_STM32F7
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32f7' family.

cpu/stm32/kconfig/f7/Kconfig.lines

@@ -0,0 +1,63 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32F722XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F723XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F730XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F732XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F733XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F745XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F746XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F750XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F756XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F765XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F767XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F769XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F777XX
+    bool
+    select CPU_FAM_F7
+
+config CPU_LINE_STM32F779XX
+    bool
+    select CPU_FAM_F7

cpu/stm32/kconfig/f7/Kconfig.models

@@ -0,0 +1,35 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32F722ZE
+    bool
+    select CPU_LINE_STM32F722XX
+
+config CPU_MODEL_STM32F723IE
+    bool
+    select CPU_LINE_STM32F723XX
+
+config CPU_MODEL_STM32F746ZG
+    bool
+    select CPU_LINE_STM32F746XX
+
+config CPU_MODEL_STM32F767ZI
+    bool
+    select CPU_LINE_STM32F767XX
+
+config CPU_MODEL_STM32F769NI
+    bool
+    select CPU_LINE_STM32F769XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32f722ze" if CPU_MODEL_STM32F722ZE
+    default "stm32f723ie" if CPU_MODEL_STM32F723IE
+    default "stm32f746zg" if CPU_MODEL_STM32F746ZG
+    default "stm32f767zi" if CPU_MODEL_STM32F767ZI
+    default "stm32f769ni" if CPU_MODEL_STM32F769NI

cpu/stm32/kconfig/g0/Kconfig

@@ -0,0 +1,22 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_G0
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M0PLUS
+    select HAS_CPU_STM32G0
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+
+config CPU_FAM
+    default "g0" if CPU_FAM_G0
+
+config HAS_CPU_STM32G0
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32g0' family.

cpu/stm32/kconfig/g0/Kconfig.lines

@@ -0,0 +1,43 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32G0B0XX
+    bool
+    select CPU_FAM_G0
+
+config CPU_LINE_STM32G0B1XX
+    bool
+    select CPU_FAM_G0
+
+config CPU_LINE_STM32G0C1XX
+    bool
+    select CPU_FAM_G0
+
+config CPU_LINE_STM32G030XX
+    bool
+    select CPU_FAM_G0
+
+config CPU_LINE_STM32G031XX
+    bool
+    select CPU_FAM_G0
+
+config CPU_LINE_STM32G041XX
+    bool
+    select CPU_FAM_G0
+
+config CPU_LINE_STM32G070XX
+    bool
+    select CPU_FAM_G0
+
+config CPU_LINE_STM32G071XX
+    bool
+    select CPU_FAM_G0
+
+config CPU_LINE_STM32G081XX
+    bool
+    select CPU_FAM_G0

cpu/stm32/kconfig/g0/Kconfig.models

@@ -0,0 +1,20 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32G070RB
+    bool
+    select CPU_LINE_STM32G070XX
+
+config CPU_MODEL_STM32G071RB
+    bool
+    select CPU_LINE_STM32G071XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32g070rb" if CPU_MODEL_STM32G070RB
+    default "stm32g071rb" if CPU_MODEL_STM32G071RB

cpu/stm32/kconfig/g4/Kconfig

@@ -0,0 +1,24 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_G4
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M4
+    select HAS_CPU_STM32G4
+    select HAS_CORTEXM_MPU
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+    select HAS_PERIPH_HWRNG
+
+config CPU_FAM
+    default "g4" if CPU_FAM_G4
+
+config HAS_CPU_STM32G4
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32g4' family.

cpu/stm32/kconfig/g4/Kconfig.lines

@@ -0,0 +1,39 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32G431XX
+    bool
+    select CPU_FAM_G4
+
+config CPU_LINE_STM32G441X
+    bool
+    select CPU_FAM_G4
+
+config CPU_LINE_STM32G471XX
+    bool
+    select CPU_FAM_G4
+
+config CPU_LINE_STM32G473XX
+    bool
+    select CPU_FAM_G4
+
+config CPU_LINE_STM32G474XX
+    bool
+    select CPU_FAM_G4
+
+config CPU_LINE_STM32G483XX
+    bool
+    select CPU_FAM_G4
+
+config CPU_LINE_STM32G484XX
+    bool
+    select CPU_FAM_G4
+
+config CPU_LINE_STM32GBK1CB
+    bool
+    select CPU_FAM_G4

cpu/stm32/kconfig/g4/Kconfig.models

@@ -0,0 +1,20 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32G431RB
+    bool
+    select CPU_LINE_STM32G431XX
+
+config CPU_MODEL_STM32G474RE
+    bool
+    select CPU_LINE_STM32G474XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32g431rb" if CPU_MODEL_STM32G431RB
+    default "stm32g474re" if CPU_MODEL_STM32G474RE

cpu/stm32/kconfig/l0/Kconfig

@@ -0,0 +1,23 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_L0
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M0PLUS
+    select HAS_CPU_STM32L0
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+    select HAS_PERIPH_EEPROM
+
+config CPU_FAM
+    default "l0" if CPU_FAM_L0
+
+config HAS_CPU_STM32L0
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32l0' family.

cpu/stm32/kconfig/l0/Kconfig.lines

@@ -0,0 +1,91 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32L010X4
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L010X6
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L010X8
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L010XB
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L011XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L021XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L031XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L041XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L051XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L052XX
+    bool
+    select CPU_FAM_L0
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32L053XX
+    bool
+    select CPU_FAM_L0
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32L061XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L062XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L063XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L071XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L072XX
+    bool
+    select CPU_FAM_L0
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32L073XX
+    bool
+    select CPU_FAM_L0
+    select HAS_PERIPH_HWRNG
+
+config CPU_LINE_STM32L081XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L082XX
+    bool
+    select CPU_FAM_L0
+
+config CPU_LINE_STM32L083XX
+    bool
+    select CPU_FAM_L0

cpu/stm32/kconfig/l0/Kconfig.models

@@ -0,0 +1,40 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32L031K6
+    bool
+    select CPU_LINE_STM32L031XX
+
+config CPU_MODEL_STM32L052T8
+    bool
+    select CPU_LINE_STM32L052XX
+
+config CPU_MODEL_STM32L053R8
+    bool
+    select CPU_LINE_STM32L053XX
+
+config CPU_MODEL_STM32L053C8
+    bool
+    select CPU_LINE_STM32L053XX
+
+config CPU_MODEL_STM32L072CZ
+    bool
+    select CPU_LINE_STM32L072XX
+
+config CPU_MODEL_STM32L073RZ
+    bool
+    select CPU_LINE_STM32L073XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32l031k6" if CPU_MODEL_STM32L031K6
+    default "stm32l052t8" if CPU_MODEL_STM32L052T8
+    default "stm32l053r8" if CPU_MODEL_STM32L053R8
+    default "stm32l053c8" if CPU_MODEL_STM32L053C8
+    default "stm32l072cz" if CPU_MODEL_STM32L072CZ
+    default "stm32l073rz" if CPU_MODEL_STM32L073RZ

cpu/stm32/kconfig/l1/Kconfig

@@ -0,0 +1,24 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_L1
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M3
+    select HAS_CPU_STM32L1
+    select HAS_CORTEXM_MPU
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+    select HAS_PERIPH_EEPROM
+
+config CPU_FAM
+    default "l1" if CPU_FAM_L1
+
+config HAS_CPU_STM32L1
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32l1' family.

cpu/stm32/kconfig/l1/Kconfig.lines

@@ -0,0 +1,95 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32L100XB
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L100XBA
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L100XC
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L151XB
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L151XBA
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L151XC
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L151XCA
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L151XD
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L151XDX
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L151XE
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L152XB
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L152XBA
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L152XC
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L152XCA
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L152XD
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L152XDX
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L152XE
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L162XC
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L162XCA
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L162XD
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L162XDX
+    bool
+    select CPU_FAM_L1
+
+config CPU_LINE_STM32L162XE
+    bool
+    select CPU_FAM_L1

cpu/stm32/kconfig/l1/Kconfig.models

@@ -0,0 +1,30 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32L151CB
+    bool
+    select CPU_LINE_STM32L151XB
+
+config CPU_MODEL_STM32L151CB_A
+    bool
+    select CPU_LINE_STM32L151XBA
+
+config CPU_MODEL_STM32L151RC
+    bool
+    select CPU_LINE_STM32L151XC
+
+config CPU_MODEL_STM32L152RE
+    bool
+    select CPU_LINE_STM32L152XE
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32l151cb" if CPU_MODEL_STM32L151CB
+    default "stm32l151cb_a" if CPU_MODEL_STM32L151CB_A
+    default "stm32l151rc" if CPU_MODEL_STM32L151RC
+    default "stm32l152re" if CPU_MODEL_STM32L152RE

cpu/stm32/kconfig/l4/Kconfig

@@ -0,0 +1,24 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_L4
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M4F
+    select HAS_CPU_STM32L4
+    select HAS_CORTEXM_MPU
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+    select HAS_PERIPH_HWRNG
+
+config CPU_FAM
+    default "l4" if CPU_FAM_L4
+
+config HAS_CPU_STM32L4
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32l4' family.

cpu/stm32/kconfig/l4/Kconfig.lines

@@ -0,0 +1,107 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32L4A6XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L4P5XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L4Q5XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L4R5XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L4R7XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L4R9XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L4S5XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L4S7XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L4S9XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L412XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L422XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L431XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L432XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L433XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L442XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L443XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L451XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L452XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L462XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L471XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L475XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L476XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L485XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L486XX
+    bool
+    select CPU_FAM_L4
+
+config CPU_LINE_STM32L496XX
+    bool
+    select CPU_FAM_L4

cpu/stm32/kconfig/l4/Kconfig.models

@@ -0,0 +1,60 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32L412KB
+    bool
+    select CPU_LINE_STM32L412XX
+
+config CPU_MODEL_STM32L432KC
+    bool
+    select CPU_LINE_STM32L432XX
+
+config CPU_MODEL_STM32L433RC
+    bool
+    select CPU_LINE_STM32L433XX
+
+config CPU_MODEL_STM32L452RE
+    bool
+    select CPU_LINE_STM32L452XX
+
+config CPU_MODEL_STM32L475VG
+    bool
+    select CPU_LINE_STM32L475XX
+
+config CPU_MODEL_STM32L476RG
+    bool
+    select CPU_LINE_STM32L476XX
+
+config CPU_MODEL_STM32L476VG
+    bool
+    select CPU_LINE_STM32L476XX
+
+config CPU_MODEL_STM32L496AG
+    bool
+    select CPU_LINE_STM32L496XX
+
+config CPU_MODEL_STM32L496ZG
+    bool
+    select CPU_LINE_STM32L496XX
+
+config CPU_MODEL_STM32L4R5ZI
+    bool
+    select CPU_LINE_STM32L4R5XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32l412kb" if CPU_MODEL_STM32L412KB
+    default "stm32l432kc" if CPU_MODEL_STM32L432KC
+    default "stm32l433rc" if CPU_MODEL_STM32L433RC
+    default "stm32l452re" if CPU_MODEL_STM32L452RE
+    default "stm32l475vg" if CPU_MODEL_STM32L475VG
+    default "stm32l476rg" if CPU_MODEL_STM32L476RG
+    default "stm32l476vg" if CPU_MODEL_STM32L476VG
+    default "stm32l496ag" if CPU_MODEL_STM32L496AG
+    default "stm32l496zg" if CPU_MODEL_STM32L496ZG
+    default "stm32l4r5zi" if CPU_MODEL_STM32L4R5ZI

cpu/stm32/kconfig/wb/Kconfig

@@ -0,0 +1,23 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_WB
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M4
+    select HAS_CPU_STM32WB
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_RAW
+    select HAS_PERIPH_HWRNG
+
+config CPU_FAM
+    default "wb" if CPU_FAM_WB
+
+config HAS_CPU_STM32WB
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32wb' family.

cpu/stm32/kconfig/wb/Kconfig.lines

@@ -0,0 +1,27 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU lines
+config CPU_LINE_STM32WB5MXX
+    bool
+    select CPU_FAM_WB
+
+config CPU_LINE_STM32WB30XX
+    bool
+    select CPU_FAM_WB
+
+config CPU_LINE_STM32WB35XX
+    bool
+    select CPU_FAM_WB
+
+config CPU_LINE_STM32WB50XX
+    bool
+    select CPU_FAM_WB
+
+config CPU_LINE_STM32WB55XX
+    bool
+    select CPU_FAM_WB

cpu/stm32/kconfig/wb/Kconfig.models

@@ -0,0 +1,15 @@
+# Copyright (c) 2020 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# CPU models
+config CPU_MODEL_STM32WB55RG
+    bool
+    select CPU_LINE_STM32WB55XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32wb55rg" if CPU_MODEL_STM32WB55RG

cpu/stm32/stm32_info.mk

@@ -1,4 +1,12 @@
 # Extract STM32 infos from CPU_MODEL
+# Example for STM32L476RG:
+#  - STM32_TYPE: L
+#  - STM32_FAMILY: 4
+#  - STM32_MODEL: 476
+#  - STM32_MODEL2: 7
+#  - STM32_MODEL3: 6
+#  - STM32_PINCOUNT: R (64)
+#  - STM32_ROMSIZE: G (1024K)
 CPU_MODEL_UPPERCASE = $(call uppercase,$(CPU_MODEL))
 STM32_INFO     := $(shell echo $(CPU_MODEL_UPPERCASE) | sed -E -e 's/^STM32(F|L|W|G)([0-7]|B)([A-Z0-9])([0-9])(.)(.)(_A)?/\1 \2 \2\3\4 \3 \4 \5 \6 \7/')
 STM32_TYPE     = $(word 1, $(STM32_INFO))

cpu/stm32/stm32_line.mk

@@ -86,6 +86,15 @@ ifeq (F,$(STM32_TYPE))
     endif
   endif
 endif
+ifeq (G,$(STM32_TYPE))
+  ifeq (B,$(STM32_FAMILY))  # STM32G4
+    ifneq (,$(filter $(STM32_MODEL), bk1))
+      CPU_LINE = STM32G$(STM32_MODEL)CB
+    else
+      CPU_LINE = STM32G$(STM32_MODEL)xx
+    endif
+  endif
+endif
 ifeq (L,$(STM32_TYPE))
   ifeq (0,$(STM32_FAMILY))  # STM32L0
     ifneq (,$(filter $(STM32_MODEL), 010))
@@ -103,7 +112,7 @@ ifeq (L,$(STM32_TYPE))
     endif
   endif
   ifeq (1,$(STM32_FAMILY))  # STM32L1
-    ifneq (,$(filter $(STM32_MODEL), 151))
+    ifneq (,$(filter $(STM32_MODEL), 100 151 152 162))
       ifneq (,$(filter $(STM32_ROMSIZE), C))
         CPU_LINE = STM32L$(STM32_MODEL)xC
       else ifneq (,$(filter $(STM32_ROMSIZE), B))
@@ -112,9 +121,15 @@ ifeq (L,$(STM32_TYPE))
         else
           CPU_LINE = STM32L$(STM32_MODEL)xB
         endif
-      endif
-    else ifneq (,$(filter $(STM32_MODEL), 152))
-      ifneq (,$(filter $(STM32_ROMSIZE), E))
+      else ifneq (,$(filter $(STM32_ROMSIZE), C))
+        ifneq (,$(filter $(STM32_RAMMOD), _A))
+          CPU_LINE = STM32L$(STM32_MODEL)xCA
+        else
+          CPU_LINE = STM32L$(STM32_MODEL)xC
+        endif
+      else ifneq (,$(filter $(STM32_ROMSIZE), D))
+        CPU_LINE = STM32L$(STM32_MODEL)xD
+      else ifneq (,$(filter $(STM32_ROMSIZE), E))
         CPU_LINE = STM32L$(STM32_MODEL)xE
       endif
     else