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Merge pull request #20391 from maribu/cpu/stm32/periph_spi_reconfigure
cpu/stm32: implement periph_spi_reconfigure
This commit is contained in:
commit
ef0e3fb54e
@ -7,11 +7,6 @@ endif
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FEATURES_PROVIDED += cpu_stm32$(CPU_FAM)
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FEATURES_PROVIDED += cpu_stm32$(CPU_FAM)
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += periph_timer_periodic
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FEATURES_PROVIDED += periph_timer_query_freqs
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FEATURES_PROVIDED += periph_rtt_overflow
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FEATURES_PROVIDED += periph_uart_modecfg
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FEATURES_PROVIDED += periph_uart_nonblocking
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FEATURES_PROVIDED += periph_gpio_ll
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FEATURES_PROVIDED += periph_gpio_ll
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FEATURES_PROVIDED += periph_gpio_ll_disconnect
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FEATURES_PROVIDED += periph_gpio_ll_disconnect
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FEATURES_PROVIDED += periph_gpio_ll_input_pull_down
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FEATURES_PROVIDED += periph_gpio_ll_input_pull_down
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@ -20,6 +15,12 @@ FEATURES_PROVIDED += periph_gpio_ll_irq
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FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_high
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FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_high
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FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_low
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FEATURES_PROVIDED += periph_gpio_ll_irq_level_triggered_low
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FEATURES_PROVIDED += periph_gpio_ll_open_drain
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FEATURES_PROVIDED += periph_gpio_ll_open_drain
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FEATURES_PROVIDED += periph_rtt_overflow
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FEATURES_PROVIDED += periph_spi_reconfigure
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FEATURES_PROVIDED += periph_timer_periodic
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FEATURES_PROVIDED += periph_timer_query_freqs
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FEATURES_PROVIDED += periph_uart_modecfg
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FEATURES_PROVIDED += periph_uart_nonblocking
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ifneq (f1,$(CPU_FAM))
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ifneq (f1,$(CPU_FAM))
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FEATURES_PROVIDED += periph_gpio_ll_open_drain_pull_up
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FEATURES_PROVIDED += periph_gpio_ll_open_drain_pull_up
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@ -32,6 +32,12 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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#ifndef DOXYGEN
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/* resolve circular dependency by declaring spi_t here */
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#define HAVE_SPI_T
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typedef uint_fast8_t spi_t;
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#endif
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/**
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/**
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* @brief Define a magic number that tells us to use hardware chip select
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* @brief Define a magic number that tells us to use hardware chip select
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*
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*
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@ -119,6 +125,12 @@ typedef struct {
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#endif
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#endif
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} spi_conf_t;
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} spi_conf_t;
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#ifndef DOXYGEN
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gpio_t spi_pin_miso(spi_t bus);
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gpio_t spi_pin_mosi(spi_t bus);
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gpio_t spi_pin_clk(spi_t bus);
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#endif
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -28,6 +28,7 @@
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#include <assert.h>
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#include <assert.h>
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#include "compiler_hints.h"
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#include "mutex.h"
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#include "mutex.h"
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#include "periph/gpio.h"
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#include "periph/gpio.h"
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#include "periph/spi.h"
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#include "periph/spi.h"
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@ -94,17 +95,17 @@ static uint8_t _get_prescaler(const spi_conf_t *conf, uint32_t clock)
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* happen if this cannot be met. So let's have a blown assertion
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* happen if this cannot be met. So let's have a blown assertion
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* rather than runtime failures that require a logic analyzer to
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* rather than runtime failures that require a logic analyzer to
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* debug. */
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* debug. */
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assert(prescaled_clock <= clock);
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assume(prescaled_clock <= clock);
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return prescaler;
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return prescaler;
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}
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}
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void spi_init(spi_t bus)
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void spi_init(spi_t bus)
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{
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{
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assert(bus < SPI_NUMOF);
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assume(bus < SPI_NUMOF);
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/* initialize device lock */
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/* initialize device lock (as locked, spi_init_pins() will unlock it */
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mutex_init(&locks[bus]);
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locks[bus] = (mutex_t)MUTEX_INIT_LOCKED;
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/* trigger pin initialization */
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/* trigger pin initialization */
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spi_init_pins(bus);
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spi_init_pins(bus);
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@ -120,6 +121,7 @@ void spi_init(spi_t bus)
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void spi_init_pins(spi_t bus)
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void spi_init_pins(spi_t bus)
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{
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{
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assume(bus < SPI_NUMOF);
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#ifdef CPU_FAM_STM32F1
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#ifdef CPU_FAM_STM32F1
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if (gpio_is_valid(spi_config[bus].sclk_pin)) {
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if (gpio_is_valid(spi_config[bus].sclk_pin)) {
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@ -149,6 +151,43 @@ void spi_init_pins(spi_t bus)
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gpio_init_af(spi_config[bus].sclk_pin, spi_config[bus].sclk_af);
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gpio_init_af(spi_config[bus].sclk_pin, spi_config[bus].sclk_af);
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}
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}
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#endif
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#endif
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mutex_unlock(&locks[bus]);
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}
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void spi_deinit_pins(spi_t bus)
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{
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assume(bus < SPI_NUMOF);
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mutex_lock(&locks[bus]);
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if (gpio_is_valid(spi_config[bus].sclk_pin)) {
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gpio_init(spi_config[bus].sclk_pin, GPIO_IN);
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}
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if (gpio_is_valid(spi_config[bus].mosi_pin)) {
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gpio_init(spi_config[bus].mosi_pin, GPIO_IN);
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}
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if (gpio_is_valid(spi_config[bus].miso_pin)) {
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gpio_init(spi_config[bus].miso_pin, GPIO_IN);
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}
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}
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gpio_t spi_pin_miso(spi_t bus)
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{
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assume(bus < SPI_NUMOF);
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return spi_config[bus].miso_pin;
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}
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gpio_t spi_pin_mosi(spi_t bus)
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{
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assume(bus < SPI_NUMOF);
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return spi_config[bus].mosi_pin;
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}
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gpio_t spi_pin_clk(spi_t bus)
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{
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assume(bus < SPI_NUMOF);
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return spi_config[bus].sclk_pin;
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}
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}
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int spi_init_cs(spi_t bus, spi_cs_t cs)
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int spi_init_cs(spi_t bus, spi_cs_t cs)
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@ -183,7 +222,7 @@ int spi_init_cs(spi_t bus, spi_cs_t cs)
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#ifdef MODULE_PERIPH_SPI_GPIO_MODE
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#ifdef MODULE_PERIPH_SPI_GPIO_MODE
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int spi_init_with_gpio_mode(spi_t bus, const spi_gpio_mode_t* mode)
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int spi_init_with_gpio_mode(spi_t bus, const spi_gpio_mode_t* mode)
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{
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{
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assert(bus < SPI_NUMOF);
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assume(bus < SPI_NUMOF);
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int ret = 0;
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int ret = 0;
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@ -212,7 +251,7 @@ int spi_init_with_gpio_mode(spi_t bus, const spi_gpio_mode_t* mode)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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{
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assert((unsigned)bus < SPI_NUMOF);
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assume((unsigned)bus < SPI_NUMOF);
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/* lock bus */
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/* lock bus */
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mutex_lock(&locks[bus]);
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mutex_lock(&locks[bus]);
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@ -379,7 +418,7 @@ void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
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const void *out, void *in, size_t len)
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const void *out, void *in, size_t len)
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{
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{
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/* make sure at least one input or one output buffer is given */
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/* make sure at least one input or one output buffer is given */
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assert(out || in);
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assume(out || in);
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/* active the given chip select line */
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/* active the given chip select line */
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if ((cs != SPI_HWCS_MASK) && gpio_is_valid(cs)) {
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if ((cs != SPI_HWCS_MASK) && gpio_is_valid(cs)) {
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