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cpu/nrf51: added I2C driver implementation
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@ -33,6 +33,30 @@ extern "C" {
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#define UART_IRQN (UART0_IRQn)
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/** @} */
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/**
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* @brief Override I2C speed settings
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* @{
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*/
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#define HAVE_I2C_SPEED_T
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typedef enum {
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I2C_SPEED_LOW = 0x01, /**< not supported */
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I2C_SPEED_NORMAL = TWI_FREQUENCY_FREQUENCY_K100, /**< 100kbit/s */
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I2C_SPEED_FAST = TWI_FREQUENCY_FREQUENCY_K400, /**< 400kbit/s */
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I2C_SPEED_FAST_PLUS = 0x02, /**< not supported */
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I2C_SPEED_HIGH = 0x03, /**< not supported */
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} i2c_speed_t;
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/** @} */
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/**
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* @brief I2C (TWI) configuration options
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*/
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typedef struct {
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NRF_TWI_Type *dev; /**< hardware device */
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uint8_t pin_scl; /**< SCL pin */
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uint8_t pin_sda; /**< SDA pin */
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uint8_t ppi; /**< PPI channel to use */
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} i2c_conf_t;
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#ifdef __cplusplus
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}
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#endif
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224
cpu/nrf51/periph/i2c.c
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224
cpu/nrf51/periph/i2c.c
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@ -0,0 +1,224 @@
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/*
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* Copyright (C) 2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_nrf51
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* @{
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*
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* @file
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* @brief Low-level I2C driver implementation
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
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#include "periph/i2c.h"
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#include "periph_conf.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#ifdef I2C_NUMOF
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/**
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* @brief If any of the 4 lower bits are set, the speed value is invalid
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*/
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#define INVALID_SPEED_MASK (0x0f)
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/**
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* @brief Initialized bus locks (we have a maximum of two devices...)
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*/
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static mutex_t locks[] = {
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MUTEX_INIT,
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MUTEX_INIT
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};
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static inline NRF_TWI_Type *dev(i2c_t bus)
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{
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return i2c_config[bus].dev;
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}
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static int error(i2c_t bus)
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{
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DEBUG("[i2c] error 0x%02x\n", (int)dev(bus)->ERRORSRC);
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dev(bus)->ERRORSRC = (TWI_ERRORSRC_DNACK_Clear |
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TWI_ERRORSRC_ANACK_Clear |
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TWI_ERRORSRC_OVERRUN_Clear);
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dev(bus)->EVENTS_ERROR = 0;
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return -1;
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}
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static int write(i2c_t bus, uint8_t addr, const void *data, int len, int stop)
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{
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uint8_t *buf = (uint8_t *)data;
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assert((bus <= I2C_NUMOF) && (len > 0));
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DEBUG("i2c: writing %i byte to the bus\n", len);
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dev(bus)->ADDRESS = (addr & 0x7f);
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for (int i = 0; i < len; i++) {
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dev(bus)->TXD = *buf++;
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dev(bus)->EVENTS_TXDSENT = 0;
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dev(bus)->TASKS_STARTTX = 1;
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while (!(dev(bus)->EVENTS_TXDSENT) && !(dev(bus)->EVENTS_ERROR)) {}
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if (dev(bus)->EVENTS_ERROR) {
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return error(bus);
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}
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}
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if (stop) {
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dev(bus)->EVENTS_STOPPED = 0;
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dev(bus)->TASKS_STOP = 1;
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while (!(dev(bus)->EVENTS_STOPPED) && !(dev(bus)->EVENTS_ERROR)) {}
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if (dev(bus)->EVENTS_ERROR) {
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return error(bus);
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}
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}
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return len;
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}
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int i2c_init_master(i2c_t bus, i2c_speed_t speed)
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{
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if (bus >= I2C_NUMOF) {
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return -1;
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}
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if (speed & INVALID_SPEED_MASK) {
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return -2;
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}
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/* power on the bus */
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dev(bus)->POWER = TWI_POWER_POWER_Enabled;
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/* pin configuration */
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GPIO_BASE->PIN_CNF[i2c_config[bus].pin_scl] = (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos);
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GPIO_BASE->PIN_CNF[i2c_config[bus].pin_scl] = (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos);
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dev(bus)->PSELSCL = i2c_config[bus].pin_scl;
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dev(bus)->PSELSDA = i2c_config[bus].pin_sda;
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NRF_PPI->CHENCLR = (1 << i2c_config[bus].ppi);
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NRF_PPI->CH[i2c_config[bus].ppi].EEP = (uint32_t)&dev(bus)->EVENTS_BB;
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/* bus clock speed configuration */
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dev(bus)->FREQUENCY = speed;
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/* enable the device */
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dev(bus)->ENABLE = TWI_ENABLE_ENABLE_Enabled;
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return 0;
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}
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int i2c_acquire(i2c_t bus)
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{
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assert(bus <= I2C_NUMOF);
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mutex_lock(&locks[bus]);
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return 0;
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}
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int i2c_release(i2c_t bus)
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{
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assert(bus <= I2C_NUMOF);
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mutex_unlock(&locks[bus]);
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return 0;
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}
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int i2c_read_byte(i2c_t bus, uint8_t address, void *data)
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{
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return i2c_read_bytes(bus, address, data, 1);
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}
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int i2c_read_bytes(i2c_t bus, uint8_t address, void *data, int length)
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{
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uint8_t *in_buf = (uint8_t *)data;
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assert((bus <= I2C_NUMOF) && (length > 0));
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DEBUG("[i2c] reading %i byte from the bus\n", length);
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/* set the client address */
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dev(bus)->ADDRESS = (address & 0x7f);
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/* setup PPI channel as alternative to the broken SHORTS
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* -> see PAN notice #36: "Shortcuts described in nRF51 Reference Manual are
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* not functional." */
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if (length == 1) {
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NRF_PPI->CH[i2c_config[bus].ppi].TEP = (uint32_t)&dev(bus)->TASKS_STOP;
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}
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else {
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NRF_PPI->CH[i2c_config[bus].ppi].TEP = (uint32_t)&dev(bus)->TASKS_SUSPEND;
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}
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NRF_PPI->CHENSET = (1 << i2c_config[bus].ppi);
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dev(bus)->EVENTS_RXDREADY = 0;
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dev(bus)->EVENTS_STOPPED = 0;
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dev(bus)->TASKS_STARTRX = 1;
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for (int i = (length - 1); i >= 0; i--) {
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while (!(dev(bus)->EVENTS_RXDREADY) && !(dev(bus)->EVENTS_ERROR)) {}
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if (dev(bus)->EVENTS_ERROR) {
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return error(bus);
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}
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*in_buf++ = (uint8_t)dev(bus)->RXD;
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if (i == 1) {
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NRF_PPI->CH[i2c_config[bus].ppi].TEP = (uint32_t)&dev(bus)->TASKS_STOP;
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}
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dev(bus)->EVENTS_RXDREADY = 0;
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dev(bus)->TASKS_RESUME = 1;
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}
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/* wait for the device to finish up */
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while (dev(bus)->EVENTS_STOPPED == 0) {}
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NRF_PPI->CHENCLR = (1 << i2c_config[bus].ppi);
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return length;
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}
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int i2c_read_reg(i2c_t bus, uint8_t address, uint8_t reg, void *data)
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{
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write(bus, address, ®, 1, 0);
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return i2c_read_bytes(bus, address, data, 1);
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}
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int i2c_read_regs(i2c_t bus, uint8_t address, uint8_t reg,
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void *data, int length)
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{
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write(bus, address, ®, 1, 0);
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return i2c_read_bytes(bus, address, data, length);
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}
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int i2c_write_byte(i2c_t bus, uint8_t address, uint8_t data)
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{
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return write(bus, address, &data, 1, 1);
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}
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int i2c_write_bytes(i2c_t bus, uint8_t address, const void *data, int length)
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{
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return write(bus, address, data, length, 1);
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}
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int i2c_write_reg(i2c_t bus, uint8_t address, uint8_t reg, uint8_t data)
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{
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write(bus, address, ®, 1, 0);
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return write(bus, address, &data, 1, 1);
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}
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int i2c_write_regs(i2c_t bus, uint8_t address, uint8_t reg,
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const void *data, int length)
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{
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write(bus, address, ®, 1, 0);
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return write(bus, address, data, length, 1);
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}
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#endif /* I2C_NUMOF */
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