From ec1980a438a3fc3a20188490eaec376763e76753 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Thu, 27 Dec 2018 18:13:48 +0100
Subject: [PATCH] cpu/esp32: RIOT_OS macro replaced by RIOT_VERSION

---
 cpu/esp32/Makefile.include                    | 1 -
 cpu/esp32/vendor/esp-idf/esp32/dport_access.c | 4 ++--
 cpu/esp32/vendor/xtensa/portasm.S             | 4 ++--
 cpu/esp32/vendor/xtensa/xtensa_rtos.h         | 6 +++---
 cpu/esp32/vendor/xtensa/xtensa_timer.h        | 8 ++++----
 cpu/esp32/vendor/xtensa/xtensa_vectors.S      | 2 +-
 6 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/cpu/esp32/Makefile.include b/cpu/esp32/Makefile.include
index 71226c690e..843c0bf65f 100644
--- a/cpu/esp32/Makefile.include
+++ b/cpu/esp32/Makefile.include
@@ -88,7 +88,6 @@ INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/include
 INCLUDES += -I$(RIOTBOARD)/common/$(CPU)/include
 INCLUDES += -I$(RIOTCPU)/$(CPU)
 
-CFLAGS  += -DRIOT_OS
 CFLAGS  += -DSCHED_PRIO_LEVELS=32
 CFLAGS  += -DSDK_NOT_USED -DCONFIG_FREERTOS_UNICORE=1 -DESP_PLATFORM
 CFLAGS  += -DLOG_TAG_IN_BRACKETS
diff --git a/cpu/esp32/vendor/esp-idf/esp32/dport_access.c b/cpu/esp32/vendor/esp-idf/esp32/dport_access.c
index d87940837c..1e4d863933 100644
--- a/cpu/esp32/vendor/esp-idf/esp32/dport_access.c
+++ b/cpu/esp32/vendor/esp-idf/esp32/dport_access.c
@@ -19,9 +19,9 @@
  * cpu0 can access DPORT register. Currently, cpu1 will wait for cpu0 finish access and exit high-priority interrupt.
  */
 
-#ifdef RIOT_OS
+#ifdef RIOT_VERSION
 #include "esp_common.h"
-#endif /* RIOT_OS */
+#endif /* RIOT_VERSION */
 
 #include <stdint.h>
 #include <string.h>
diff --git a/cpu/esp32/vendor/xtensa/portasm.S b/cpu/esp32/vendor/xtensa/portasm.S
index db0da672f1..1098755b37 100644
--- a/cpu/esp32/vendor/xtensa/portasm.S
+++ b/cpu/esp32/vendor/xtensa/portasm.S
@@ -23,7 +23,7 @@
 //-----------------------------------------------------------------------------
 */
 
-#ifdef RIOT_OS
+#ifdef RIOT_VERSION
 #include "xtensa_conf.h"
 
 #define pxCurrentTCB            sched_active_thread
@@ -59,7 +59,7 @@ port_IntStack:
 port_IntStackTop:
     .word       0
 
-#ifndef RIOT_OS
+#ifndef RIOT_VERSION
 port_switch_flag:
     .word       0
 #endif
diff --git a/cpu/esp32/vendor/xtensa/xtensa_rtos.h b/cpu/esp32/vendor/xtensa/xtensa_rtos.h
index 7d27df21c8..ecf0fc27c9 100644
--- a/cpu/esp32/vendor/xtensa/xtensa_rtos.h
+++ b/cpu/esp32/vendor/xtensa/xtensa_rtos.h
@@ -50,7 +50,7 @@ Should be included by all Xtensa generic and RTOS port-specific sources.
 
 #include    <xtensa/corebits.h>
 #include    <xtensa/config/system.h>
-#ifndef RIOT_OS
+#ifndef RIOT_VERSION
 #include    <xtensa/simcall.h>
 #endif
 #define XT_BOARD 1
@@ -58,7 +58,7 @@ Should be included by all Xtensa generic and RTOS port-specific sources.
 /*
 Include any RTOS specific definitions that are needed by this header.
 */
-#ifndef RIOT_OS
+#ifndef RIOT_VERSION
 #include    <FreeRTOSConfig.h>
 #endif
 
@@ -152,7 +152,7 @@ RTOS may optionally define XT_TICK_PER_SEC in its own way (eg. macro).
 */
 // void XT_RTOS_TIMER_INT(void)
 #define XT_RTOS_TIMER_INT   _frxt_timer_int
-#ifndef RIOT_OS
+#ifndef RIOT_VERSION
     #define XT_TICK_PER_SEC     configTICK_RATE_HZ
 #endif
 
diff --git a/cpu/esp32/vendor/xtensa/xtensa_timer.h b/cpu/esp32/vendor/xtensa/xtensa_timer.h
index 28141a49d1..a477dc3375 100644
--- a/cpu/esp32/vendor/xtensa/xtensa_timer.h
+++ b/cpu/esp32/vendor/xtensa/xtensa_timer.h
@@ -47,10 +47,10 @@ and the Xtensa core configuration need not have a timer.
 #include    <xtensa/corebits.h>
 #include    <xtensa/config/system.h>
 
-#ifndef RIOT_OS
+#ifndef RIOT_VERSION
 #include    "xtensa_rtos.h"     /* in case this wasn't included directly */
 #include    <FreeRTOSConfig.h>
-#endif /* ifndef RIOT_OS */
+#endif /* ifndef RIOT_VERSION */
 
 #ifdef __cplusplus
 extern "C" {
@@ -112,7 +112,7 @@ Otherwise select the first low or medium priority interrupt timer available.
 
 #endif /* XCHAL_NUM_TIMERS */
 
-#ifndef RIOT_OS
+#ifndef RIOT_VERSION
 /*
 Set processor clock frequency, used to determine clock divisor for timer tick.
 User should BE SURE TO ADJUST THIS for the Xtensa platform being used.
@@ -156,7 +156,7 @@ Derivation of clock divisor for timer tick and interrupt (one per tick).
 #ifdef XT_CLOCK_FREQ
 #define XT_TICK_DIVISOR     (XT_CLOCK_FREQ / XT_TICK_PER_SEC)
 #endif
-#endif /* ifndef RIOT_OS */
+#endif /* ifndef RIOT_VERSION */
 
 #ifndef __ASSEMBLER__
 extern unsigned _xt_tick_divisor;
diff --git a/cpu/esp32/vendor/xtensa/xtensa_vectors.S b/cpu/esp32/vendor/xtensa/xtensa_vectors.S
index 008d4a2afb..cefda2f5e9 100644
--- a/cpu/esp32/vendor/xtensa/xtensa_vectors.S
+++ b/cpu/esp32/vendor/xtensa/xtensa_vectors.S
@@ -219,7 +219,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     movi    a3, XT_TIMER_INTEN              /* a3 = timer interrupt bit */
     wsr     a4, INTCLEAR                    /* clear sw or edge-triggered interrupt */
 
-    #ifndef RIOT_OS                         /* we use it as hardware timer in RIOT OS */
+    #ifndef RIOT_VERSION                         /* we use it as hardware timer in RIOT OS */
     beq     a3, a4, 7f                      /* if timer interrupt then skip table */
     #endif