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pkg/tinyusb/hw: add UTMI HS PHY for STM32

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This commit is contained in:
Gunar Schorcht 2022-10-19 18:27:11 +02:00
parent 8e127644b1
commit eb5035971a
1 changed files with 62 additions and 0 deletions
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62
pkg/tinyusb/hw/hw_stm32.c
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@ -122,6 +122,68 @@ static int tinyusb_hw_init_dev(const dwc2_usb_otg_fshs_config_t *conf)
global_regs->GUSBCFG &= ~USB_OTG_GUSBCFG_ULPIFSLS;
}
#elif defined(MODULE_PERIPH_USBDEV_HS_UTMI)
else if (conf->phy == DWC2_USB_OTG_PHY_UTMI) {
/* enable ULPI clock */
periph_clk_en(conf->ahb, RCC_AHB1ENR_OTGHSULPIEN);
/* enable UTMI HS PHY Controller clock */
periph_clk_en(APB2, RCC_APB2ENR_OTGPHYCEN);
#ifdef USB_OTG_GUSBCFG_ULPI_UTMI_SEL
/* select UTMI+ PHY */
global_regs->GUSBCFG &= ~USB_OTG_GUSBCFG_ULPI_UTMI_SEL;
#endif /* USB_OTG_GUSBCFG_ULPI_UTMI_SEL */
#ifdef USB_OTG_GUSBCFG_PHYIF
/* use the 8-bit interface and single data rate */
global_regs->GUSBCFG &= ~USB_OTG_GUSBCFG_PHYIF;
#endif /* USB_OTG_GUSBCFG_PHYIF */
/* disable the on-chip FS transceiver */
global_regs->GUSBCFG &= ~USB_OTG_GUSBCFG_PHYSEL;
/* configure the USB HS PHY Controller (USB_HS_PHYC),
* USB_HS_PHYC and GCCFG are STM32 specific */
#ifdef USB_HS_PHYC
/* enable USB HS PHY Controller */
global_regs->GCCFG |= USB_OTG_GCCFG_PHYHSEN;
/* determine the PLL input clock of the USB HS PHY from HSE clock */
switch (CLOCK_HSE) {
case 12000000:
USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL1_PLLSEL_12MHZ;
break;
case 12500000:
USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL1_PLLSEL_12_5MHZ;
break;
case 16000000:
USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL1_PLLSEL_16MHZ;
break;
case 24000000:
USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL1_PLLSEL_24MHZ;
break;
case 25000000:
USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL1_PLLSEL_25MHZ;
break;
default:
assert(0);
}
/* configure the tuning interface of the USB HS PHY */
USB_HS_PHYC->USB_HS_PHYC_TUNE |= conf->phy_tune;
/* check whether the LDO regulator is used by on the chip */
if (USB_HS_PHYC->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_USED) {
/* enable the LDO */
USB_HS_PHYC->USB_HS_PHYC_LDO |= USB_HS_PHYC_LDO_ENABLE;
/* wait until the LDO is ready */
while (!(USB_HS_PHYC->USB_HS_PHYC_LDO & USB_HS_PHYC_LDO_STATUS)) {}
}
/* enable the PLL of the USB HS PHY */
USB_HS_PHYC->USB_HS_PHYC_PLL |= USB_HS_PHYC_PLL_PLLEN;
#endif /* USB_HS_PHYC */
}
#else /* MODULE_PERIPH_USBDEV_HS_ULPI */
else {
/* only on-chip PHY support enabled */