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https://github.com/RIOT-OS/RIOT.git
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* line ending change
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parent
7e071464a8
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@ -1,205 +1,216 @@
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/******************************************************************************
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Copyright 2008-2009, Freie Universitaet Berlin (FUB). All rights reserved.
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These sources were developed at the Freie Universitaet Berlin, Computer Systems
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and Telematics group (http://cst.mi.fu-berlin.de).
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-------------------------------------------------------------------------------
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This file is part of FeuerWare.
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This program is free software: you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free Software
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Foundation, either version 3 of the License, or (at your option) any later
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version.
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FeuerWare is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along with
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this program. If not, see http://www.gnu.org/licenses/ .
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--------------------------------------------------------------------------------
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For further information and questions please use the web site
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http://scatterweb.mi.fu-berlin.de
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and the mailinglist (subscription via web site)
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scatterweb@lists.spline.inf.fu-berlin.de
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*******************************************************************************/
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/*
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* debug_uart.c: provides initial serial debug output
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*
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* Copyright (C) 2008, 2009 Kaspar Schleiser <kaspar@schleiser.de>
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* Heiko Will <hwill@inf.fu-berlin.de>
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include "lpc23xx.h"
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#include "VIC.h"
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/**
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* @file
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* @ingroup lpc2387
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*
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* @author Freie Universität Berlin, Computer Systems & Telematics, FeuerWhere project
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* @version $Revision$
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*
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* @note $Id$
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*/
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typedef struct toprint {
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unsigned int len;
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char content[];
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}toprint;
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#define QUEUESIZE 255
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static volatile toprint* queue[QUEUESIZE];
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static volatile unsigned char queue_head = 0;
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static volatile unsigned char queue_tail = 0;
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static volatile unsigned char queue_items = 0;
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static volatile unsigned int actual_pos = 0;
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static volatile unsigned int running = 0;
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static volatile unsigned int fifo = 0;
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static volatile toprint* actual = NULL;
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void (*uart0_callback)(int);
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static inline void enqueue(void) {
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queue_items++;
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queue_tail++;
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}
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static inline void dequeue(void) {
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actual = (queue[queue_head]);
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queue_items--;
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queue_head++;
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}
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static void push_queue(void) {
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running = 1;
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start:
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if (!actual) {
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if (queue_items) {
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dequeue();
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} else {
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running = 0;
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if (!fifo)
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while(!(U0LSR & BIT6)){};
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return;
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}
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}
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while ((actual_pos < actual->len) && (fifo++ < 16)){
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U0THR = actual->content[actual_pos++];
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}
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if (actual_pos == actual->len) {
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free((void*)actual);
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actual = NULL;
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actual_pos = 0;
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goto start;
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}
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}
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int uart_active(void){
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return (running || fifo);
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}
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static inline void receive(int c)
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{
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if (uart0_callback != NULL) uart0_callback(c);
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}
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void stdio_flush(void)
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{
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U0IER &= ~BIT1; // disable THRE interrupt
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while(running) {
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while(!(U0LSR & (BIT5|BIT6))){}; // transmit fifo
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fifo=0;
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push_queue(); // dequeue to fifo
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}
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U0IER |= BIT1; // enable THRE interrupt
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}
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void UART0_IRQHandler(void) __attribute__((interrupt("IRQ")));
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void UART0_IRQHandler(void)
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{
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int iir;
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iir = U0IIR;
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switch(iir & UIIR_ID_MASK) {
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case UIIR_THRE_INT: // Transmit Holding Register Empty
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fifo=0;
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push_queue();
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break;
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case UIIR_CTI_INT: // Character Timeout Indicator
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case UIIR_RDA_INT: // Receive Data Available
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do {
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int c = U0RBR;
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receive(c);
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} while (U0LSR & ULSR_RDR);
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break;
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default:
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U0LSR;
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U0RBR;
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break;
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} // switch
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VICVectAddr = 0; // Acknowledge Interrupt
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}
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static inline int uart0_puts(char *astring,int length)
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{
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while (queue_items == (QUEUESIZE-1)) {} ;
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U0IER = 0;
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queue[queue_tail] = malloc(length+sizeof(unsigned int));
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queue[queue_tail]->len = length;
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memcpy(&queue[queue_tail]->content,astring,length);
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enqueue();
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if (!running)
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push_queue();
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U0IER |= BIT0 | BIT1; // enable RX irq
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/* alternative without queue:
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int i;
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for (i=0;i<length;i++) {
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while (!(U0LSR & BIT5));
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U0THR = astring[i];
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}
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*/
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return length;
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}
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int fw_puts(char *astring,int length)
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{
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return uart0_puts(astring, length);
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}
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int
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bl_uart_init(void)
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{
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PCONP |= PCUART0; // power on
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// UART0 clock divider is CCLK/8
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PCLKSEL0 |= BIT6 + BIT7;
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U0LCR = 0x83; // 8 bits, no Parity, 1 Stop bit
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// TODO: UART Baudrate calculation using uart->config->speed
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/*
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* Baudrate calculation
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* BR = PCLK (9 MHz) / (16 x 256 x DLM + DLL) x (1/(DIVADDVAL/MULVAL))
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*/
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U0FDR = 0x92; // DIVADDVAL = 0010 = 2, MULVAL = 1001 = 9
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U0DLM = 0x00;
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U0DLL = 0x04;
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U0LCR = 0x03; // DLAB = 0
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U0FCR = 0x07; // Enable and reset TX and RX FIFO
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/* irq */
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install_irq(UART0_INT, UART0_IRQHandler, 6);
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U0IER |= BIT0 | BIT1; // enable RX+TX irq
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return 1;
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}
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/******************************************************************************
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Copyright 2008-2009, Freie Universitaet Berlin (FUB). All rights reserved.
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These sources were developed at the Freie Universitaet Berlin, Computer Systems
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and Telematics group (http://cst.mi.fu-berlin.de).
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-------------------------------------------------------------------------------
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This file is part of FeuerWare.
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This program is free software: you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free Software
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Foundation, either version 3 of the License, or (at your option) any later
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version.
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|
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FeuerWare is distributed in the hope that it will be useful, but WITHOUT
|
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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|
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You should have received a copy of the GNU General Public License along with
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this program. If not, see http://www.gnu.org/licenses/ .
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--------------------------------------------------------------------------------
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For further information and questions please use the web site
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http://scatterweb.mi.fu-berlin.de
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and the mailinglist (subscription via web site)
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scatterweb@lists.spline.inf.fu-berlin.de
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*******************************************************************************/
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/*
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* debug_uart.c: provides initial serial debug output
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*
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* Copyright (C) 2008, 2009 Kaspar Schleiser <kaspar@schleiser.de>
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* Heiko Will <hwill@inf.fu-berlin.de>
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include "lpc23xx.h"
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#include "VIC.h"
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#include <msg.h>
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#include <ringbuffer.h>
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#include "uart0.h"
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/**
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* @file
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* @ingroup lpc2387
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*
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* @author Freie Universität Berlin, Computer Systems & Telematics, FeuerWhere project
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* @version $Revision$
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*
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* @note $Id$
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*/
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typedef struct toprint {
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unsigned int len;
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char content[];
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}toprint;
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#define QUEUESIZE 255
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static volatile toprint* queue[QUEUESIZE];
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static volatile unsigned char queue_head = 0;
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static volatile unsigned char queue_tail = 0;
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static volatile unsigned char queue_items = 0;
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static volatile unsigned int actual_pos = 0;
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static volatile unsigned int running = 0;
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static volatile unsigned int fifo = 0;
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static volatile toprint* actual = NULL;
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int uart0_handler_pid = 0;
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extern ringbuffer uart0_ringbuffer;
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static inline void enqueue(void) {
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queue_items++;
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queue_tail++;
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}
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static inline void dequeue(void) {
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actual = (queue[queue_head]);
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queue_items--;
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queue_head++;
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}
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static void push_queue(void) {
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running = 1;
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start:
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if (!actual) {
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if (queue_items) {
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dequeue();
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} else {
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running = 0;
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if (!fifo)
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while(!(U0LSR & BIT6)){};
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return;
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}
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}
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while ((actual_pos < actual->len) && (fifo++ < 16)){
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U0THR = actual->content[actual_pos++];
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}
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if (actual_pos == actual->len) {
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free((void*)actual);
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actual = NULL;
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actual_pos = 0;
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goto start;
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}
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}
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int uart_active(void){
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return (running || fifo);
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}
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static void notify_handler() {
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if (uart0_handler_pid) {
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msg m;
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m.type = 0;
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msg_send_int(&m, uart0_handler_pid);
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}
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}
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void stdio_flush(void)
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{
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U0IER &= ~BIT1; // disable THRE interrupt
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while(running) {
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while(!(U0LSR & (BIT5|BIT6))){}; // transmit fifo
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fifo=0;
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push_queue(); // dequeue to fifo
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}
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U0IER |= BIT1; // enable THRE interrupt
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}
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void UART0_IRQHandler(void) __attribute__((interrupt("IRQ")));
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void UART0_IRQHandler(void)
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{
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int iir;
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iir = U0IIR;
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switch(iir & UIIR_ID_MASK) {
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case UIIR_THRE_INT: // Transmit Holding Register Empty
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fifo=0;
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push_queue();
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break;
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case UIIR_CTI_INT: // Character Timeout Indicator
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case UIIR_RDA_INT: // Receive Data Available
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do {
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int c = U0RBR;
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rb_add_element(&uart0_ringbuffer, c);
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} while (U0LSR & ULSR_RDR);
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notify_handler();
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break;
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default:
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U0LSR;
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U0RBR;
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break;
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} // switch
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VICVectAddr = 0; // Acknowledge Interrupt
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}
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static inline int uart0_puts(char *astring,int length)
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{
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while (queue_items == (QUEUESIZE-1)) {} ;
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U0IER = 0;
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queue[queue_tail] = malloc(length+sizeof(unsigned int));
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queue[queue_tail]->len = length;
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memcpy(&queue[queue_tail]->content,astring,length);
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enqueue();
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if (!running)
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push_queue();
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U0IER |= BIT0 | BIT1; // enable RX irq
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/* alternative without queue:
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int i;
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for (i=0;i<length;i++) {
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while (!(U0LSR & BIT5));
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U0THR = astring[i];
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}
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*/
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return length;
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}
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int fw_puts(char *astring,int length)
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{
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return uart0_puts(astring, length);
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}
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int
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bl_uart_init(void)
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{
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PCONP |= PCUART0; // power on
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// UART0 clock divider is CCLK/8
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PCLKSEL0 |= BIT6 + BIT7;
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U0LCR = 0x83; // 8 bits, no Parity, 1 Stop bit
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|
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// TODO: UART Baudrate calculation using uart->config->speed
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/*
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* Baudrate calculation
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* BR = PCLK (9 MHz) / (16 x 256 x DLM + DLL) x (1/(DIVADDVAL/MULVAL))
|
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*/
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U0FDR = 0x92; // DIVADDVAL = 0010 = 2, MULVAL = 1001 = 9
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U0DLM = 0x00;
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U0DLL = 0x04;
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U0LCR = 0x03; // DLAB = 0
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U0FCR = 0x07; // Enable and reset TX and RX FIFO
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/* irq */
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install_irq(UART0_INT, UART0_IRQHandler, 6);
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U0IER |= BIT0 | BIT1; // enable RX+TX irq
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return 1;
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}
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