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boards/esp32: changes for RTOS SDK
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@ -173,7 +173,7 @@ static const gpio_t pwm1_channels[] = PWM1_GPIOS;
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*/
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/**
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* @brief Static array with configuration for declared I2C devices
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* @brief Static array with configuration for declared SPI devices
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*/
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static const spi_conf_t spi_config[] = {
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#ifdef SPI0_CTRL
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@ -220,7 +220,7 @@ static const spi_conf_t spi_config[] = {
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#endif
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/**
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* @brief Static array with configuration for declared I2C devices
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* @brief Static array with configuration for declared UART devices
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*/
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static const uart_conf_t uart_config[] = {
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{
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@ -249,13 +249,7 @@ static const uart_conf_t uart_config[] = {
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*
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* @note UART_NUMOF definition must not be changed.
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*/
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#if defined(UART1_TXD) && defined(UART1_RXD) && defined(UART2_TXD) && defined(UART2_RXD)
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#define UART_NUMOF 3
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#elif (defined(UART1_TXD) && defined(UART1_RXD)) || (defined(UART2_TXD) && defined(UART2_RXD))
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#define UART_NUMOF 2
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#else
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#define UART_NUMOF 1
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#endif
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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#ifdef __cplusplus
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@ -96,7 +96,7 @@ static const i2c_conf_t i2c_config[] = {
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* GPIOs that can be used as PWM channels are defined by #PWM0_GPIOS in board
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* definition.
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*
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* @note The minumum PWM period that can be realized is 10 us or 100.000 PWM
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* @note The minimum PWM period that can be realized is 10 us or 100.000 PWM
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* clock cycles per second. Therefore, the product of frequency and resolution
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* should not be greater than 100.000. Otherwise the frequency is scaled down
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* automatically.
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