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cpu/atmega2560: added CMSIS style reg defs for UART
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@ -46,6 +46,18 @@ typedef struct {
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REG16 OCR[3]; /**< output compare */
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} mega_timer_t;
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/**
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* @brief UART register map
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*/
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typedef struct {
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REG8 CSRA; /**< control and status register A */
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REG8 CSRB; /**< control and status register B */
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REG8 CSRC; /**< control and status register C */
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REG8 reserved; /**< reserved */
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REG16 BRR; /**< baud rate register */
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REG8 DR; /**< data register */
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} mega_uart_t;
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/**
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* @brief Base register address definitions
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* @{
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@ -54,6 +66,11 @@ typedef struct {
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#define MEGA_TIMER3_BASE (uint16_t *)(&TCCR3A)
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#define MEGA_TIMER4_BASE (uint16_t *)(&TCCR4A)
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#define MEGA_TIMER5_BASE (uint16_t *)(&TCCR5A)
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#define MEGA_UART0_BASE ((uint16_t *)(&UCSR0A))
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#define MEGA_UART1_BASE ((uint16_t *)(&UCSR1A))
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#define MEGA_UART2_BASE ((uint16_t *)(&UCSR2A))
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#define MEGA_UART3_BASE ((uint16_t *)(&UCSR2A))
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/** @} */
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/**
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@ -64,6 +81,11 @@ typedef struct {
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#define MEGA_TIMER3 ((mega_timer_t *)MEGA_TIMER3_BASE)
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#define MEGA_TIMER4 ((mega_timer_t *)MEGA_TIMER4_BASE)
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#define MEGA_TIMER5 ((mega_timer_t *)MEGA_TIMER5_BASE)
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#define MEGA_UART0 ((mega_uart_t *)MEGA_UART0_BASE)
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#define MEGA_UART1 ((mega_uart_t *)MEGA_UART1_BASE)
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#define MEGA_UART2 ((mega_uart_t *)MEGA_UART2_BASE)
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#define MEGA_UART3 ((mega_uart_t *)MEGA_UART3_BASE)
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/** @} */
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#ifdef __cplusplus
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