mirror of
https://github.com/RIOT-OS/RIOT.git
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boards/maple-mini: initial support
This commit is contained in:
parent
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commit
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3
boards/maple-mini/Makefile
Normal file
3
boards/maple-mini/Makefile
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@ -0,0 +1,3 @@
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MODULE = board
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include $(RIOTBASE)/Makefile.base
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13
boards/maple-mini/Makefile.features
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13
boards/maple-mini/Makefile.features
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@ -0,0 +1,13 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Various other features (if any)
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FEATURES_PROVIDED += cpp
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m3_1
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13
boards/maple-mini/Makefile.include
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13
boards/maple-mini/Makefile.include
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# define the cpu used by the maple-mini board
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export CPU = stm32f1
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export CPU_MODEL = stm32f103cb
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# define the default port depending on the host OS
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PORT_LINUX ?= /dev/ttyACM0
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))
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# setup serial terminal
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include $(RIOTBOARD)/Makefile.include.serial
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# this board uses openocd
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include $(RIOTBOARD)/Makefile.include.openocd
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31
boards/maple-mini/board.c
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31
boards/maple-mini/board.c
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@ -0,0 +1,31 @@
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/*
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* Copyright (C) 2016 Frits Kuipers
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_maple-mini
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* @{
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*
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* @file
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* @brief Board specific implementations for the maple-mini board
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*
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* @author Frits Kuipers <frits.kuipers@gmail.com>
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*
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* @}
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*/
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#include "board.h"
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#include "periph/gpio.h"
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void board_init(void)
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{
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/* initialize the CPU */
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cpu_init();
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/* initialize the boards LED */
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gpio_init(LED0_PIN, GPIO_OUT);
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}
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7
boards/maple-mini/dist/openocd.cfg
vendored
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7
boards/maple-mini/dist/openocd.cfg
vendored
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@ -0,0 +1,7 @@
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source [find interface/stlink-v2-1.cfg]
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transport select hla_swd
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source [find target/stm32f1x.cfg]
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reset_config srst_only
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70
boards/maple-mini/include/board.h
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70
boards/maple-mini/include/board.h
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/*
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* Copyright (C) 2016 Frits Kuipers
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @defgroup boards_maple-mini maple-mini
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* @ingroup boards
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* @brief Board specific files for the maple-mini board
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* @{
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*
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* @file
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* @brief Board specific definitions for the maple-mini board
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*
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* @author Frits Kuipers <frits.kuipers@gmail.com>
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name xtimer configuration
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* @{
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*/
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#define XTIMER_WIDTH (16)
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#define XTIMER_BACKOFF 5
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/** @} */
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/**
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* @name Macros for controlling the on-board LEDs.
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* @{
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*/
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#define LED0_PIN GPIO_PIN(PORT_B, 1)
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#define LED_PORT GPIOB
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#define LED0_MASK (1 << 1)
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#define LED0_ON (LED_PORT->BSRR = LED0_MASK)
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#define LED0_OFF (LED_PORT->BRR = LED0_MASK)
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#define LED0_TOGGLE (LED_PORT->ODR ^= LED0_MASK)
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/** @} */
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/**
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* @brief User button
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*/
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#define BTN_B1_PIN GPIO_PIN(PORT_B, 8)
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/**
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* @brief Use the USART1 for STDIO on this board
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*/
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#define UART_STDIO_DEV UART_DEV(1)
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO
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*/
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void board_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* BOARD_H_ */
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/** @} */
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51
boards/maple-mini/include/gpio_params.h
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51
boards/maple-mini/include/gpio_params.h
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/*
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* Copyright (C) 2017 Frits Kuipers
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_maple-mini
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* @{
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*
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* @file
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* @brief Board specific configuration of direct mapped GPIOs
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*
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* @author Frits Kuipers <frits.kuipers@gmail.com>
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*/
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#ifndef GPIO_PARAMS_H
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#define GPIO_PARAMS_H
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#include "board.h"
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#include "saul/periph.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Button/LED configuration
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*/
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static const saul_gpio_params_t saul_gpio_params[] =
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{
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{
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.name = "LED",
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.pin = LED0_PIN,
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.mode = GPIO_OUT
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},
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{
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.name = "BUTTON",
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.pin = BTN_B1_PIN,
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.mode = GPIO_IN
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}
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* GPIO_PARAMS_H */
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/** @} */
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205
boards/maple-mini/include/periph_conf.h
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205
boards/maple-mini/include/periph_conf.h
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/*
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* Copyright (C) 2016 Frits Kuipers
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_maple-mini
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the maple-mini board
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*
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* @author Frits Kuipers <frits.kuipers@gmail.com>
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*/
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#ifndef PERIPH_CONF_H_
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#define PERIPH_CONF_H_
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock system configuration
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* @{
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*/
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#define CLOCK_HSE (8000000U) /* external oscillator */
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#define CLOCK_CORECLOCK (72000000U) /* desired core clock frequency */
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/* the actual PLL values are automatically generated */
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#define CLOCK_PLL_DIV (1)
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#define CLOCK_PLL_MUL CLOCK_CORECLOCK / CLOCK_HSE
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/* AHB, APB1, APB2 dividers */
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#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
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#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1
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#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV2
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/* Bus clocks */
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#define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
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#define CLOCK_APB2 (CLOCK_CORECLOCK)
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/* Flash latency */
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#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_2 /* for >= 72 MHz */
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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#define ADC_NUMOF (0)
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/** @} */
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/**
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* @brief DAC configuration
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* @{
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*/
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#define DAC_NUMOF (0)
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/** @} */
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/**
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* @brief Timer configuration
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = TIM2,
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.max = 0x0000ffff,
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.rcc_mask = RCC_APB1ENR_TIM2EN,
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.bus = APB1,
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.irqn = TIM2_IRQn
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},
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{
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.dev = TIM3,
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.max = 0x0000ffff,
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.rcc_mask = RCC_APB1ENR_TIM3EN,
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.bus = APB1,
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.irqn = TIM3_IRQn
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}
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};
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#define TIMER_0_ISR isr_tim2
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#define TIMER_1_ISR isr_tim3
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#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
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/** @} */
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/**
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* @brief UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART2,
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.rcc_mask = RCC_APB1ENR_USART2EN,
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.rx_pin = GPIO_PIN(PORT_A, 3),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.bus = APB1,
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.irqn = USART2_IRQn
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},
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_A, 10),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.bus = APB2,
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.irqn = USART1_IRQn
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},
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{
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.dev = USART3,
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.rcc_mask = RCC_APB1ENR_USART3EN,
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.rx_pin = GPIO_PIN(PORT_B, 11),
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.tx_pin = GPIO_PIN(PORT_B, 10),
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.bus = APB1,
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.irqn = USART3_IRQn
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}
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};
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#define UART_0_ISR isr_usart2
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#define UART_1_ISR isr_usart1
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#define UART_2_ISR isr_usart3
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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#define I2C_NUMOF (2U)
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#define I2C_0_EN 1
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#define I2C_1_EN 0
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#define I2C_IRQ_PRIO 1
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#define I2C_APBCLK (36000000U)
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/* I2C 0 device configuration */
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#define I2C_0_DEV I2C1
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#define I2C_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_I2C1EN)
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#define I2C_0_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C1EN))
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#define I2C_0_EVT_IRQ I2C1_EV_IRQn
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#define I2C_0_EVT_ISR isr_i2c1_ev
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#define I2C_0_ERR_IRQ I2C1_ER_IRQn
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#define I2C_0_ERR_ISR isr_i2c1_er
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/* I2C 0 pin configuration */
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#define I2C_0_SCL_PIN GPIO_PIN(PORT_B, 6) /* D15 */
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#define I2C_0_SDA_PIN GPIO_PIN(PORT_B, 7) /* D16 */
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/* I2C 1 device configuration */
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#define I2C_1_DEV I2C2
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#define I2C_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_I2C2EN)
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#define I2C_1_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C2EN))
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#define I2C_1_EVT_IRQ I2C2_EV_IRQn
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#define I2C_1_EVT_ISR isr_i2c2_ev
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#define I2C_1_ERR_IRQ I2C2_ER_IRQn
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#define I2C_1_ERR_ISR isr_i2c2_er
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/* I2C 1 pin configuration */
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#define I2C_1_SCL_PIN GPIO_PIN(PORT_B, 10) /* D1 */
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#define I2C_1_SDA_PIN GPIO_PIN(PORT_B, 11) /* D0 */
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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#define SPI_NUMOF (2U)
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#define SPI_0_EN 1
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#define SPI_1_EN 0
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#define SPI_IRQ_PRIO 1
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/* SPI 0 device config */
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#define SPI_0_DEV SPI1
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#define SPI_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_SPI1EN)
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#define SPI_0_CLKDIS() (RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN)
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#define SPI_0_IRQ SPI1_IRQn
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#define SPI_0_IRQ_HANDLER isr_spi1
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#define SPI_0_BUS_DIV 1
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/* SPI 0 pin configuration */
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#define SPI_0_CLK_PIN GPIO_PIN(PORT_A, 5) /* D6 */
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#define SPI_0_MISO_PIN GPIO_PIN(PORT_A, 6) /* D5 */
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#define SPI_0_MOSI_PIN GPIO_PIN(PORT_A, 7) /* D4 */
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/* SPI 1 device config */
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#define SPI_1_DEV SPI2
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#define SPI_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_SPI2EN)
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#define SPI_1_CLKDIS() (RCC->APB1ENR &= ~RCC_APB1ENR_SPI2EN)
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#define SPI_1_IRQ SPI2_IRQn
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#define SPI_1_IRQ_HANDLER isr_spi2
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#define SPI_1_BUS_DIV 1
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/* SPI 1 pin configuration */
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#define SPI_1_CLK_PIN GPIO_PIN(PORT_B, 13) /* D30 */
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#define SPI_1_MISO_PIN GPIO_PIN(PORT_B, 14) /* D29 */
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#define SPI_1_MOSI_PIN GPIO_PIN(PORT_B, 15) /* D28 */
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H_ */
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@ -17,7 +17,8 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon nrf51dongle nrf6310 nucleo-f103 \
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nucleo-f334 pca10000 pca10005 spark-core \
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stm32f0discovery weio yunjia-nrf51822 nucleo-f072 \
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cc2650stk nucleo-f030 nucleo-f070 microbit \
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calliope-mini nucleo32-f042 nucleo32-f303 opencm9-04
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calliope-mini nucleo32-f042 nucleo32-f303 opencm9-04 \
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maple-mini
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# Include packages that pull up and auto-init the link layer.
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# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present
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@ -7,8 +7,8 @@ BOARD ?= samr21-xpro
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# This has to be the absolute path to the RIOT base directory:
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RIOTBASE ?= $(CURDIR)/../..
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BOARD_INSUFFICIENT_MEMORY := airfy-beacon cc2650stk msb-430 msb-430h pca10000 pca10005 \
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nrf51dongle nrf6310 nucleo-f103 nucleo-f334 \
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BOARD_INSUFFICIENT_MEMORY := airfy-beacon cc2650stk maple-mini msb-430 msb-430h pca10000 \
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pca10005 nrf51dongle nrf6310 nucleo-f103 nucleo-f334 \
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spark-core stm32f0discovery telosb \
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weio wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1 nucleo-f072 \
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nucleo-f030 nucleo-f070 microbit calliope-mini \
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|
@ -5,10 +5,10 @@ include ../Makefile.tests_common
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# This has to be the absolute path to the RIOT base directory:
|
||||
RIOTBASE ?= $(CURDIR)/../..
|
||||
|
||||
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos msb-430 msb-430h nrf51dongle \
|
||||
nrf6310 nucleo-f103 nucleo-f334 pca10000 pca10005 spark-core \
|
||||
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 \
|
||||
yunjia-nrf51822 z1 nucleo-f030 nucleo32-f042
|
||||
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos maple-mini msb-430 maple-mini msb-430h \
|
||||
nrf51dongle nrf6310 nucleo-f103 nucleo-f334 pca10000 pca10005 \
|
||||
spark-core stm32f0discovery telosb weio wsn430-v1_3b \
|
||||
wsn430-v1_4 yunjia-nrf51822 z1 nucleo-f030 nucleo32-f042
|
||||
|
||||
# Include packages that pull up and auto-init the link layer.
|
||||
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present
|
||||
|
@ -5,7 +5,7 @@ include ../Makefile.tests_common
|
||||
# This has to be the absolute path to the RIOT base directory:
|
||||
RIOTBASE ?= $(CURDIR)/../..
|
||||
|
||||
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos msb-430 msb-430h nrf51dongle \
|
||||
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos maple-mini msb-430 msb-430h nrf51dongle \
|
||||
nrf6310 nucleo-f103 nucleo-f334 pca10000 pca10005 spark-core \
|
||||
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 \
|
||||
yunjia-nrf51822 z1 nucleo-f030 nucleo-f070 nucleo32-f042
|
||||
|
@ -14,6 +14,7 @@ BOARD_WHITELIST += limifrog-v1 # cortex-m3
|
||||
BOARD_WHITELIST += mbed_lpc1768 # cortex-m3
|
||||
BOARD_WHITELIST += msbiot # cortex-m4f
|
||||
BOARD_WHITELIST += mulle # cortex-m4
|
||||
BOARD_WHITELIST += maple-mini # cortex-m3
|
||||
BOARD_WHITELIST += nrf52dk # cortex-m4f
|
||||
BOARD_WHITELIST += nucleo-f103 # cortex-m3
|
||||
BOARD_WHITELIST += nucleo-f207 # cortex-m3
|
||||
|
@ -15,6 +15,7 @@ BOARD_WHITELIST := \
|
||||
mulle \
|
||||
nucleo-f091 \
|
||||
nucleo-f103 \
|
||||
nucleo-f103 \
|
||||
nucleo-f303 \
|
||||
nucleo-f334 \
|
||||
nucleo-f401 \
|
||||
|
@ -1,8 +1,8 @@
|
||||
APPLICATION = thread_cooperation
|
||||
include ../Makefile.tests_common
|
||||
|
||||
BOARD_INSUFFICIENT_MEMORY := cc2650stk chronos msb-430 msb-430h mbed_lpc1768 \
|
||||
stm32f0discovery pca10000 pca10005 \
|
||||
BOARD_INSUFFICIENT_MEMORY := cc2650stk chronos maple-mini msb-430 msb-430h \
|
||||
mbed_lpc1768 stm32f0discovery pca10000 pca10005 \
|
||||
yunjia-nrf51822 spark-core airfy-beacon nucleo-f103 \
|
||||
nucleo-f334 nrf51dongle nrf6310 weio nucleo-f072 \
|
||||
nucleo-f030 nucleo-f070 microbit calliope-mini \
|
||||
|
@ -2,7 +2,7 @@ APPLICATION = unittests
|
||||
include ../Makefile.tests_common
|
||||
|
||||
BOARD_INSUFFICIENT_MEMORY := airfy-beacon cc2650stk chronos ek-lm4f120xl \
|
||||
msb-430 msb-430h pca10000 \
|
||||
maple-mini msb-430 msb-430h pca10000 \
|
||||
pca10005 spark-core stm32f0discovery stm32f3discovery \
|
||||
telosb wsn430-v1_3b wsn430-v1_4 z1 nucleo-f103 \
|
||||
nucleo-f334 yunjia-nrf51822 samr21-xpro \
|
||||
|
Loading…
Reference in New Issue
Block a user