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core: use enums for panic
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@ -28,6 +28,29 @@
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extern "C" {
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#endif
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/**
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* @brief Definition of available panic modes
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*/
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typedef enum {
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PANIC_GENERAL_ERROR,
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PANIC_SOFT_REBOOT,
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PANIC_HARD_REBOOT,
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PANIC_ASSERT_FAIL,
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#ifdef MODULE_CORTEXM_COMMON
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PANIC_NMI_HANDLER, /**< non maskable interrupt */
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PANIC_HARD_FAULT, /**< hard fault */
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#if defined(CPU_ARCH_CORTEX_M3) || defined(CPU_ARCH_CORTEX_M4) || \
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defined(CPU_ARCH_CORTEX_M4F)
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PANIC_MEM_MANAGE, /**< memory controller interrupt */
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PANIC_BUS_FAULT, /**< bus fault */
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PANIC_USAGE_FAULT, /**< undefined instruction or unaligned access */
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PANIC_DEBUG_MON, /**< debug interrupt */
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#endif
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PANIC_DUMMY_HANDLER, /**< unhandled interrupt */
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#endif
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PANIC_UNDEFINED
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} core_panic_t;
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/**
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* @brief Handle an unrecoverable error by halting or rebooting the system
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*
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@ -48,7 +71,7 @@
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*
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* @return this function never returns
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* */
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NORETURN void core_panic(int crash_code, const char *message);
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NORETURN void core_panic(core_panic_t crash_code, const char *message);
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#ifdef __cplusplus
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}
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@ -38,7 +38,7 @@
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static int crashed = 0;
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/* WARNING: this function NEVER returns! */
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NORETURN void core_panic(int crash_code, const char *message)
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NORETURN void core_panic(core_panic_t crash_code, const char *message)
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{
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(void) crash_code;
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@ -90,22 +90,6 @@ extern "C" {
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#define ARCH_HAS_ATOMIC_COMPARE_AND_SWAP 1
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#endif
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/**
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* @brief Definition of available panic modes
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*/
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typedef enum {
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PANIC_NMI_HANDLER, /**< non maskable interrupt */
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PANIC_HARD_FAULT, /**< hard fault */
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#if defined(CPU_ARCH_CORTEX_M3) || defined(CPU_ARCH_CORTEX_M4) || \
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defined(CPU_ARCH_CORTEX_M4F)
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PANIC_MEM_MANAGE, /**< memory controller interrupt */
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PANIC_BUS_FAULT, /**< bus fault */
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PANIC_USAGE_FAULT, /**< undefined instruction or unaligned access */
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PANIC_DEBUG_MON, /**< debug interrupt */
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#endif
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PANIC_DUMMY_HANDLER, /**< unhandled interrupt */
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} panic_t;
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/**
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* @brief Initialization of the CPU
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*/
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@ -539,7 +539,7 @@ void I2C_0_ERR_ISR(void)
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if (state & I2C_ISR_ALERT) {
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DEBUG("SMBALERT\n");
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}
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core_panic(0x0,"I2C FAULT");
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core_panic(PANIC_GENERAL_ERROR, "I2C FAULT");
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}
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#endif /* I2C_0_EN */
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@ -170,7 +170,7 @@ void kw2xrf_set_sequence(kw2xrf_t *dev, kw2xrf_physeq_t seq)
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/* At 10MHz SPI-Clock, 40000 should be in the magnitue of 0.1s */
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if (max_tries == 40000) {
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DEBUG("kw2xrf_error: device does not finish sequence\n");
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core_panic(-EBUSY, "kw2xrf_error: device does not finish sequence");
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core_panic(PANIC_GENERAL_ERROR, "kw2xrf_error: device does not finish sequence");
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}
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#endif
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@ -397,7 +397,7 @@ int kw2xrf_init(kw2xrf_t *dev, spi_t spi, spi_speed_t spi_speed,
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kw2xrf_spi_init(spi, spi_speed, cs_pin);
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if (kw2xrf_on(dev) != 0) {
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core_panic(0x42, "Could not start MKW2XD radio transceiver");
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core_panic(PANIC_GENERAL_ERROR, "Could not start MKW2XD radio transceiver");
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}
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/* General initialization of interrupt sources.
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@ -42,7 +42,7 @@ void *__dso_handle __attribute__((weak)) = NULL;
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*/
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extern "C" void __cxa_pure_virtual ()
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{
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core_panic(123, "PURE VIRTUAL CALL");
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core_panic(PANIC_GENERAL_ERROR, "PURE VIRTUAL CALL");
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}
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/**
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@ -81,7 +81,7 @@ namespace __gnu_cxx {
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*/
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void __verbose_terminate_handler()
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{
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core_panic(123, "UNHANDLED C++ EXCEPTION");
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core_panic(PANIC_GENERAL_ERROR, "UNHANDLED C++ EXCEPTION");
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}
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} /* namespace __gnu_cxx */
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