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Merge pull request #20773 from crasbe/pr/wb55_adc

cpu/stm32: add ADC support for WB55
This commit is contained in:
Dylan Laduranty 2024-07-08 09:33:52 +00:00 committed by GitHub
commit e1e5f75b18
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6 changed files with 81 additions and 1 deletions

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@ -3,6 +3,7 @@ CPU = stm32
CPU_MODEL = stm32wb55rg
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_lpuart
FEATURES_PROVIDED += periph_pwm

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@ -164,6 +164,48 @@ static const stm32_usbdev_fs_config_t stm32_usbdev_fs_config[] = {
*/
#define USBDEV_NUMOF ARRAY_SIZE(stm32_usbdev_fs_config)
/**
* @brief ADC configuration
*
* Note that we do not configure all ADC channels,
* and not in the STM32WB55RG order. Instead, we
* just define 6 ADC channels, for the Nucleo
* Arduino header pins A0-A5 and the internal VBAT channel.
*
* To find appropriate device and channel find in the
* board manual, table showing pin assignments and
* information about ADC - a text similar to ADC[X]_IN[Y],
* where:
* [X] - describes used device - indexed from 0,
* for example ADC1_IN10 is device 0,
* [Y] - describes used channel - indexed from 1,
* for example ADC1_IN10 is channel 10
*
* For P-NUCLEO-WB55 this information is in board manual,
* Table 10, page 39.
*
* VBAT is connected ADC1_IN18 or ADC3_IN18 and a voltage divider
* is used, so that only 1/3 of the actual VBAT is measured. This
* allows for a supply voltage higher than the reference voltage.
*
* For P-NUCLEO-WB55 more information is provided in the Reference Manual,
* in section 16.4.31 - Vbat supply monitoring, page 475.
* @{
*/
static const adc_conf_t adc_config[] = {
{GPIO_PIN(PORT_C, 0), 0, 1}, /*< ADC1_IN1 */
{GPIO_PIN(PORT_C, 1), 0, 2}, /*< ADC1_IN2 */
{GPIO_PIN(PORT_A, 1), 0, 6}, /*< ADC1_IN6 */
{GPIO_PIN(PORT_A, 0), 0, 5}, /*< ADC1_IN5 */
{GPIO_PIN(PORT_C, 3), 0, 4}, /*< ADC1_IN4 */
{GPIO_PIN(PORT_C, 2), 0, 3}, /*< ADC1_IN3 */
{GPIO_UNDEF, 0, 18}, /* VBAT */
};
#define VBAT_ADC ADC_LINE(6) /**< VBAT ADC line */
#define ADC_NUMOF ARRAY_SIZE(adc_config)
/** @} */
#ifdef __cplusplus
}
#endif

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@ -79,7 +79,7 @@ ifneq (,$(filter periph_rtc_mem,$(USEMODULE)))
endif
ifneq (,$(filter periph_adc,$(FEATURES_USED)))
ifneq (,$(filter f3 l4 wl, $(CPU_FAM)))
ifneq (,$(filter f3 l4 wb wl, $(CPU_FAM)))
USEMODULE += ztimer
USEMODULE += ztimer_msec
endif

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@ -24,6 +24,26 @@
extern "C" {
#endif
/**
* @brief Available number of ADC devices
*/
#if defined(ADC3)
#define ADC_DEVS (3U)
#elif defined(ADC2)
#define ADC_DEVS (2U)
#elif defined(ADC1)
#define ADC_DEVS (1U)
#else
#error "Can't determine the number of ADC devices"
#endif
#if defined(CPU_MODEL_STM32WB55RG)
/**
* @brief ADC voltage regulator start-up time [us]
*/
#define ADC_T_ADCVREG_STUP_US (20)
#endif
#ifndef DOXYGEN
/**
@ -32,6 +52,21 @@ extern "C" {
*/
#define STM32_BOOTLOADER_ADDR (0x1FFF0000)
/**
* @brief Override ADC resolution values
* @{
*/
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x0), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0x1), /**< not applicable */
ADC_RES_16BIT = (0x2) /**< not applicable */
} adc_res_t;
/** @} */
/**
* @name Constants for internal VBAT ADC line
* @{

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@ -17,6 +17,8 @@ ifneq (,$(filter periph_adc,$(USEMODULE)))
SRC += adc_f4_f7.c
else ifneq (,$(filter $(CPU_FAM),f0 g0 c0))
SRC += adc_f0_g0_c0.c
else ifneq (,$(filter $(CPU_FAM),l4 wb))
SRC += adc_l4_wb.c
else
SRC += adc_$(CPU_FAM).c
endif