From ddb95e7648028ebe2de2156703f7f5c2a215ca46 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 10 May 2023 08:35:17 +0200 Subject: [PATCH] cpu/stm32/periph_gpio: reset PU/PD for ADC channels PU/PD configuration has to be `0b00` for analog outputs which is corresponds to the reset state. However, if the GPIO is not in reset state but was used digital input/output with any pull resistor, the PU/PD configuration has also to be reset to work as ADC channel. --- cpu/stm32/periph/gpio_all.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/cpu/stm32/periph/gpio_all.c b/cpu/stm32/periph/gpio_all.c index 68c5fa0737..8a253d7503 100644 --- a/cpu/stm32/periph/gpio_all.c +++ b/cpu/stm32/periph/gpio_all.c @@ -186,8 +186,9 @@ void gpio_init_analog(gpio_t pin) #else periph_clk_en(AHB1, (RCC_AHB1ENR_GPIOAEN << _port_num(pin))); #endif - /* set to analog mode */ + /* set to analog mode, PUPD has to be 0b00 */ _port(pin)->MODER |= (0x3 << (2 * _pin_num(pin))); + _port(pin)->PUPDR &= ~(0x3 << (2 * _pin_num(pin))); } void gpio_irq_enable(gpio_t pin)