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https://github.com/RIOT-OS/RIOT.git
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Merge pull request #6142 from haukepetersen/add_nrf51_i2c
cpu/nrf51: added I2C driver implementation
This commit is contained in:
commit
dcfd0d656b
@ -4,6 +4,7 @@ FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_hwrng
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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@ -94,6 +94,28 @@ static const timer_conf_t timer_config[] = {
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#define SPI_0_PIN_SCK 15
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/** @} */
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/**
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* @brief I2C (TWI) configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = NRF_TWI0,
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.pin_scl = 7,
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.pin_sda = 8,
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.ppi = 0
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},
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{
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.dev = NRF_TWI1,
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.pin_scl = 9,
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.pin_sda = 10,
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.ppi = 1
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}
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};
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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/** @} */
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/**
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* @brief ADC configuration
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*
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@ -2,6 +2,7 @@
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_hwrng
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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@ -96,6 +96,22 @@ static const timer_conf_t timer_config[] = {
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#define UART_PIN_TX 24
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/** @} */
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/**
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* @brief I2C (TWI) configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = NRF_TWI0,
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.pin_scl = 0,
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.pin_sda = 30,
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.ppi = 0
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}
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};
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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/** @} */
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/**
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* @brief ADC configuration
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*
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@ -3,6 +3,7 @@ FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_hwrng
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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@ -96,6 +96,22 @@ static const timer_conf_t timer_config[] = {
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#define UART_PIN_TX 24
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/** @} */
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/**
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* @brief I2C (TWI) configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = NRF_TWI0,
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.pin_scl = 0,
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.pin_sda = 30,
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.ppi = 0
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}
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};
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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/** @} */
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/**
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* @brief ADC configuration
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*
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@ -4,6 +4,7 @@ FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_flashpage
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_hwrng
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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@ -99,6 +99,22 @@ static const timer_conf_t timer_config[] = {
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#define SPI_1_PIN_SCK 22
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/** @} */
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/**
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* @brief I2C (TWI) configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = NRF_TWI0,
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.pin_scl = 23,
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.pin_sda = 24,
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.ppi = 0
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}
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};
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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/** @} */
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/**
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* @brief ADC configuration
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*
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65
cpu/nrf51/include/periph_cpu.h
Normal file
65
cpu/nrf51/include/periph_cpu.h
Normal file
@ -0,0 +1,65 @@
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/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_nrf51
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* @{
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*
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* @file
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* @brief nRF51 specific definitions for handling peripherals
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*
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* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_
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#define PERIPH_CPU_
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Redefine some peripheral names to unify them between nRF51 and 52
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* @{
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*/
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#define GPIO_BASE (NRF_GPIO)
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#define UART_IRQN (UART0_IRQn)
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/** @} */
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/**
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* @brief Override I2C speed settings
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* @{
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*/
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#define HAVE_I2C_SPEED_T
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typedef enum {
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I2C_SPEED_LOW = 0x01, /**< not supported */
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I2C_SPEED_NORMAL = TWI_FREQUENCY_FREQUENCY_K100, /**< 100kbit/s */
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I2C_SPEED_FAST = TWI_FREQUENCY_FREQUENCY_K400, /**< 400kbit/s */
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I2C_SPEED_FAST_PLUS = 0x02, /**< not supported */
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I2C_SPEED_HIGH = 0x03, /**< not supported */
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} i2c_speed_t;
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/** @} */
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/**
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* @brief I2C (TWI) configuration options
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*/
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typedef struct {
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NRF_TWI_Type *dev; /**< hardware device */
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uint8_t pin_scl; /**< SCL pin */
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uint8_t pin_sda; /**< SDA pin */
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uint8_t ppi; /**< PPI channel to use */
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} i2c_conf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_ */
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/** @} */
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224
cpu/nrf51/periph/i2c.c
Normal file
224
cpu/nrf51/periph/i2c.c
Normal file
@ -0,0 +1,224 @@
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/*
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* Copyright (C) 2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_nrf51
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* @{
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*
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* @file
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* @brief Low-level I2C driver implementation
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
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#include "periph/i2c.h"
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#include "periph_conf.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#ifdef I2C_NUMOF
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/**
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* @brief If any of the 4 lower bits are set, the speed value is invalid
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*/
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#define INVALID_SPEED_MASK (0x0f)
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/**
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* @brief Initialized bus locks (we have a maximum of two devices...)
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*/
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static mutex_t locks[] = {
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MUTEX_INIT,
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MUTEX_INIT
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};
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static inline NRF_TWI_Type *dev(i2c_t bus)
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{
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return i2c_config[bus].dev;
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}
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static int error(i2c_t bus)
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{
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DEBUG("[i2c] error 0x%02x\n", (int)dev(bus)->ERRORSRC);
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dev(bus)->ERRORSRC = (TWI_ERRORSRC_DNACK_Clear |
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TWI_ERRORSRC_ANACK_Clear |
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TWI_ERRORSRC_OVERRUN_Clear);
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dev(bus)->EVENTS_ERROR = 0;
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return -1;
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}
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static int write(i2c_t bus, uint8_t addr, const void *data, int len, int stop)
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{
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uint8_t *buf = (uint8_t *)data;
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assert((bus <= I2C_NUMOF) && (len > 0));
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DEBUG("i2c: writing %i byte to the bus\n", len);
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dev(bus)->ADDRESS = (addr & 0x7f);
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for (int i = 0; i < len; i++) {
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dev(bus)->TXD = *buf++;
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dev(bus)->EVENTS_TXDSENT = 0;
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dev(bus)->TASKS_STARTTX = 1;
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while (!(dev(bus)->EVENTS_TXDSENT) && !(dev(bus)->EVENTS_ERROR)) {}
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if (dev(bus)->EVENTS_ERROR) {
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return error(bus);
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}
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}
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if (stop) {
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dev(bus)->EVENTS_STOPPED = 0;
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dev(bus)->TASKS_STOP = 1;
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while (!(dev(bus)->EVENTS_STOPPED) && !(dev(bus)->EVENTS_ERROR)) {}
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if (dev(bus)->EVENTS_ERROR) {
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return error(bus);
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}
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}
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return len;
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}
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int i2c_init_master(i2c_t bus, i2c_speed_t speed)
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{
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if (bus >= I2C_NUMOF) {
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return -1;
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}
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if (speed & INVALID_SPEED_MASK) {
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return -2;
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}
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/* power on the bus */
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dev(bus)->POWER = TWI_POWER_POWER_Enabled;
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/* pin configuration */
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GPIO_BASE->PIN_CNF[i2c_config[bus].pin_scl] = (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos);
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GPIO_BASE->PIN_CNF[i2c_config[bus].pin_scl] = (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos);
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dev(bus)->PSELSCL = i2c_config[bus].pin_scl;
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dev(bus)->PSELSDA = i2c_config[bus].pin_sda;
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NRF_PPI->CHENCLR = (1 << i2c_config[bus].ppi);
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NRF_PPI->CH[i2c_config[bus].ppi].EEP = (uint32_t)&dev(bus)->EVENTS_BB;
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/* bus clock speed configuration */
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dev(bus)->FREQUENCY = speed;
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/* enable the device */
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dev(bus)->ENABLE = TWI_ENABLE_ENABLE_Enabled;
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return 0;
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}
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int i2c_acquire(i2c_t bus)
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{
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assert(bus <= I2C_NUMOF);
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mutex_lock(&locks[bus]);
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return 0;
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}
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int i2c_release(i2c_t bus)
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{
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assert(bus <= I2C_NUMOF);
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mutex_unlock(&locks[bus]);
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return 0;
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}
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int i2c_read_byte(i2c_t bus, uint8_t address, void *data)
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{
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return i2c_read_bytes(bus, address, data, 1);
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}
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int i2c_read_bytes(i2c_t bus, uint8_t address, void *data, int length)
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{
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uint8_t *in_buf = (uint8_t *)data;
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assert((bus <= I2C_NUMOF) && (length > 0));
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DEBUG("[i2c] reading %i byte from the bus\n", length);
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/* set the client address */
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dev(bus)->ADDRESS = (address & 0x7f);
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/* setup PPI channel as alternative to the broken SHORTS
|
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* -> see PAN notice #36: "Shortcuts described in nRF51 Reference Manual are
|
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* not functional." */
|
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if (length == 1) {
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NRF_PPI->CH[i2c_config[bus].ppi].TEP = (uint32_t)&dev(bus)->TASKS_STOP;
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}
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else {
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NRF_PPI->CH[i2c_config[bus].ppi].TEP = (uint32_t)&dev(bus)->TASKS_SUSPEND;
|
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}
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NRF_PPI->CHENSET = (1 << i2c_config[bus].ppi);
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dev(bus)->EVENTS_RXDREADY = 0;
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dev(bus)->EVENTS_STOPPED = 0;
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dev(bus)->TASKS_STARTRX = 1;
|
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|
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for (int i = (length - 1); i >= 0; i--) {
|
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while (!(dev(bus)->EVENTS_RXDREADY) && !(dev(bus)->EVENTS_ERROR)) {}
|
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if (dev(bus)->EVENTS_ERROR) {
|
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return error(bus);
|
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}
|
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|
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*in_buf++ = (uint8_t)dev(bus)->RXD;
|
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|
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if (i == 1) {
|
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NRF_PPI->CH[i2c_config[bus].ppi].TEP = (uint32_t)&dev(bus)->TASKS_STOP;
|
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}
|
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|
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dev(bus)->EVENTS_RXDREADY = 0;
|
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dev(bus)->TASKS_RESUME = 1;
|
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}
|
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|
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/* wait for the device to finish up */
|
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while (dev(bus)->EVENTS_STOPPED == 0) {}
|
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NRF_PPI->CHENCLR = (1 << i2c_config[bus].ppi);
|
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|
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return length;
|
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}
|
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|
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int i2c_read_reg(i2c_t bus, uint8_t address, uint8_t reg, void *data)
|
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{
|
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write(bus, address, ®, 1, 0);
|
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return i2c_read_bytes(bus, address, data, 1);
|
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}
|
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|
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int i2c_read_regs(i2c_t bus, uint8_t address, uint8_t reg,
|
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void *data, int length)
|
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{
|
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write(bus, address, ®, 1, 0);
|
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return i2c_read_bytes(bus, address, data, length);
|
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}
|
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|
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int i2c_write_byte(i2c_t bus, uint8_t address, uint8_t data)
|
||||
{
|
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return write(bus, address, &data, 1, 1);
|
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}
|
||||
|
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int i2c_write_bytes(i2c_t bus, uint8_t address, const void *data, int length)
|
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{
|
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return write(bus, address, data, length, 1);
|
||||
}
|
||||
|
||||
int i2c_write_reg(i2c_t bus, uint8_t address, uint8_t reg, uint8_t data)
|
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{
|
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write(bus, address, ®, 1, 0);
|
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return write(bus, address, &data, 1, 1);
|
||||
}
|
||||
|
||||
int i2c_write_regs(i2c_t bus, uint8_t address, uint8_t reg,
|
||||
const void *data, int length)
|
||||
{
|
||||
write(bus, address, ®, 1, 0);
|
||||
return write(bus, address, data, length, 1);
|
||||
}
|
||||
|
||||
#endif /* I2C_NUMOF */
|
41
cpu/nrf52/include/periph_cpu.h
Normal file
41
cpu/nrf52/include/periph_cpu.h
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2015-2016 Freie Universität Berlin
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_nrf52
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief nRF52 specific definitions for handling peripherals
|
||||
*
|
||||
* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
|
||||
*/
|
||||
|
||||
#ifndef PERIPH_CPU_
|
||||
#define PERIPH_CPU_
|
||||
|
||||
#include "periph_cpu_common.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Redefine some peripheral names to unify them between nRF51 and 52
|
||||
* @{
|
||||
*/
|
||||
#define GPIO_BASE (NRF_P0)
|
||||
#define UART_IRQN (UARTE0_UART0_IRQn)
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PERIPH_CPU_ */
|
||||
/** @} */
|
@ -11,13 +11,13 @@
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief CPU specific definitions for handling peripherals
|
||||
* @brief nRF5x common definitions for handling peripherals
|
||||
*
|
||||
* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
|
||||
*/
|
||||
|
||||
#ifndef CPU_PERIPH_H
|
||||
#define CPU_PERIPH_H
|
||||
#ifndef PERIPH_CPU_COMMON_H_
|
||||
#define PERIPH_CPU_COMMON_H_
|
||||
|
||||
#include "cpu.h"
|
||||
|
||||
@ -25,22 +25,6 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Iron out some differences in register and IRQ channel naming between
|
||||
* the different nRFx family members
|
||||
* @{
|
||||
*/
|
||||
#if defined(CPU_FAM_NRF51)
|
||||
#define GPIO_BASE (NRF_GPIO)
|
||||
#define UART_IRQN (UART0_IRQn)
|
||||
#elif defined(CPU_FAM_NRF52)
|
||||
#define GPIO_BASE (NRF_P0)
|
||||
#define UART_IRQN (UARTE0_UART0_IRQn)
|
||||
#else
|
||||
#error "nrf5x_common: no valid value for CPU_FAM_XX defined"
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @brief Length of the CPU_ID in octets
|
||||
*/
|
||||
@ -116,15 +100,15 @@ typedef enum {
|
||||
* @brief Timer configuration options
|
||||
*/
|
||||
typedef struct {
|
||||
NRF_TIMER_Type *dev;
|
||||
uint8_t channels;
|
||||
uint8_t bitmode;
|
||||
uint8_t irqn;
|
||||
NRF_TIMER_Type *dev; /**< timer device */
|
||||
uint8_t channels; /**< number of channels available */
|
||||
uint8_t bitmode; /**< counter width */
|
||||
uint8_t irqn; /**< IRQ number of the timer device */
|
||||
} timer_conf_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CPU_PERIPH_H */
|
||||
#endif /* PERIPH_CPU_COMMON_H_ */
|
||||
/** @} */
|
Binary file not shown.
@ -6,7 +6,7 @@ USEMODULE += xtimer
|
||||
USEMODULE += printf_float
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_I2C ?= I2C_0
|
||||
TEST_I2C ?= I2C_DEV\(0\)
|
||||
TEST_MEASURE_OVERSAMPLING ?= BMP180_ULTRALOWPOWER
|
||||
TEST_ALTITUDE ?= 158 # altitude in Polytechnique School campus
|
||||
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += hdc1000
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_HDC1000_I2C ?= I2C_0
|
||||
TEST_HDC1000_I2C ?= I2C_DEV\(0\)
|
||||
TEST_HDC1000_ADDR ?= 0x43
|
||||
|
||||
# export parameters
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += hih6130
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_HIH6130_I2C ?= I2C_0
|
||||
TEST_HIH6130_I2C ?= I2C_DEV\(0\)
|
||||
TEST_HIH6130_ADDR ?= 0x27
|
||||
|
||||
# export parameters
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += ina220
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_INA220_I2C ?= I2C_0
|
||||
TEST_INA220_I2C ?= I2C_DEV\(0\)
|
||||
TEST_INA220_ADDR ?= 0x40
|
||||
|
||||
# export parameters
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += isl29020
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_ISL29020_I2C ?= I2C_0
|
||||
TEST_ISL29020_I2C ?= I2C_DEV\(0\)
|
||||
TEST_ISL29020_ADDR ?= 68
|
||||
|
||||
# export parameters
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += isl29125
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_ISL29125_I2C ?= I2C_0
|
||||
TEST_ISL29125_I2C ?= I2C_DEV\(0\)
|
||||
TEST_ISL29125_IRQ_PIN ?= GPIO_PIN\(0,0\)
|
||||
|
||||
# export parameters
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += l3g4200d
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_L3G4200D_I2C ?= I2C_0
|
||||
TEST_L3G4200D_I2C ?= I2C_DEV\(0\)
|
||||
TEST_L3G4200D_ADDR ?= 104
|
||||
TEST_L3G4200D_INT ?= GPIO_PIN\(0,0\)
|
||||
TEST_L3G4200D_DRDY ?= GPIO_PIN\(0,1\)
|
||||
|
@ -13,7 +13,7 @@ ifneq (,$(TEST_LIS3MDL_I2C))
|
||||
CFLAGS += -DTEST_LIS3MDL_I2C=$(TEST_LIS3MDL_I2C)
|
||||
else
|
||||
# set random default
|
||||
CFLAGS += -DTEST_LIS3MDL_I2C=I2C_1
|
||||
CFLAGS += -DTEST_LIS3MDL_I2C=I2C_DEV\(1\)
|
||||
endif
|
||||
ifneq (,$(TEST_LIS3MDL_MAG_ADDR))
|
||||
CFLAGS += -DTEST_LIS3MDL_MAG_ADDR=$(TEST_LIS3MDL_MAG_ADDR)
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += lps331ap
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_LPS331AP_I2C ?= I2C_0
|
||||
TEST_LPS331AP_I2C ?= I2C_DEV\(0\)
|
||||
TEST_LPS331AP_ADDR ?= 92
|
||||
|
||||
# export parameters
|
||||
|
@ -13,7 +13,7 @@ ifneq (,$(filter iotlab-m3,$(BOARD)))
|
||||
endif
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_LSM303DLHC_I2C ?= I2C_0
|
||||
TEST_LSM303DLHC_I2C ?= I2C_DEV\(0\)
|
||||
TEST_LSM303DLHC_ACC_ADDR ?= 25
|
||||
TEST_LSM303DLHC_MAG_ADDR ?= 30
|
||||
TEST_LSM303DLHC_ACC_PIN ?= GPIO_PIN\(0,0\)
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += mag3110
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_MAG3110_I2C ?= I2C_0
|
||||
TEST_MAG3110_I2C ?= I2C_DEV\(0\)
|
||||
TEST_MAG3110_ADDR ?= 0x0E
|
||||
TEST_MAG3110_USER_OFFSET_X ?= -2000
|
||||
TEST_MAG3110_USER_OFFSET_Y ?= 180
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += mma8652
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_MMA8652_I2C ?= I2C_0
|
||||
TEST_MMA8652_I2C ?= I2C_DEV\(0\)
|
||||
TEST_MMA8652_ADDR ?= 0x1D
|
||||
TEST_MMA8652_USER_OFFSET_X ?= 0
|
||||
TEST_MMA8652_USER_OFFSET_Y ?= 0
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += mpl3115a2
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_MPL3115A2_I2C ?= I2C_0
|
||||
TEST_MPL3115A2_I2C ?= I2C_DEV\(0\)
|
||||
TEST_MPL3115A2_ADDR ?= 0x60
|
||||
|
||||
# export parameters
|
||||
|
@ -14,7 +14,7 @@ ifneq (,$(filter msbiot,$(BOARD)))
|
||||
endif
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_I2C ?= I2C_0
|
||||
TEST_I2C ?= I2C_DEV\(0\)
|
||||
TEST_HW_ADDR ?= MPU9150_HW_ADDR_HEX_68
|
||||
TEST_COMP_ADDR ?= MPU9150_COMP_ADDR_HEX_0C
|
||||
|
||||
|
@ -8,7 +8,7 @@ USEMODULE += srf02
|
||||
USEMODULE += shell
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_SRF02_I2C ?= I2C_0
|
||||
TEST_SRF02_I2C ?= I2C_DEV\(0\)
|
||||
TEST_MODE ?= SRF02_MODE_REAL_CM
|
||||
|
||||
# export parameters
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += xtimer
|
||||
USEMODULE += srf08
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
export TEST_SRF08_I2C ?= I2C_0
|
||||
export TEST_SRF08_I2C ?= I2C_DEV\(0\)
|
||||
export TEST_SRF08_SPEED ?= I2C_SPEED_NORMAL
|
||||
export TEST_MODE ?= SRF08_MODE_CM
|
||||
export TEST_NUM_ECHOS ?= 3
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += tcs37727
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_TCS37727_I2C ?= I2C_0
|
||||
TEST_TCS37727_I2C ?= I2C_DEV\(0\)
|
||||
TEST_TCS37727_ADDR ?= 0x29
|
||||
|
||||
# export parameters
|
||||
|
@ -7,7 +7,7 @@ USEMODULE += tmp006
|
||||
USEMODULE += xtimer
|
||||
|
||||
# set default device parameters in case they are undefined
|
||||
TEST_TMP006_I2C ?= I2C_0
|
||||
TEST_TMP006_I2C ?= I2C_DEV\(0\)
|
||||
TEST_TMP006_ADDR ?= 0x41
|
||||
TEST_TMP006_CONFIG_CR ?= TMP006_CONFIG_CR_DEF
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user