diff --git a/boards/samr34-xpro/Makefile b/boards/samr34-xpro/Makefile new file mode 100644 index 0000000000..f8fcbb53a0 --- /dev/null +++ b/boards/samr34-xpro/Makefile @@ -0,0 +1,3 @@ +MODULE = board + +include $(RIOTBASE)/Makefile.base diff --git a/boards/samr34-xpro/Makefile.dep b/boards/samr34-xpro/Makefile.dep new file mode 100644 index 0000000000..52861764e8 --- /dev/null +++ b/boards/samr34-xpro/Makefile.dep @@ -0,0 +1,7 @@ +ifneq (,$(filter netdev_default,$(USEMODULE))) + USEMODULE += sx1276 +endif + +ifneq (,$(filter saul_default,$(USEMODULE))) + USEMODULE += saul_gpio +endif diff --git a/boards/samr34-xpro/Makefile.features b/boards/samr34-xpro/Makefile.features new file mode 100644 index 0000000000..5ebdb3748c --- /dev/null +++ b/boards/samr34-xpro/Makefile.features @@ -0,0 +1,11 @@ +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_i2c +FEATURES_PROVIDED += periph_rtc +FEATURES_PROVIDED += periph_rtt +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart + +# samr34 is a specific flavor of saml21 +include $(RIOTCPU)/saml21/Makefile.features diff --git a/boards/samr34-xpro/Makefile.include b/boards/samr34-xpro/Makefile.include new file mode 100644 index 0000000000..3b0cb0e14c --- /dev/null +++ b/boards/samr34-xpro/Makefile.include @@ -0,0 +1,8 @@ +# define the cpu used by the samr34-xpro board (based on saml21) +export CPU = saml21 +export CPU_MODEL = samr34j18b + +# set edbg device type +EDBG_DEVICE_TYPE = atmel_cm0p + +include $(RIOTMAKE)/boards/sam0.inc.mk diff --git a/boards/samr34-xpro/board.c b/boards/samr34-xpro/board.c new file mode 100644 index 0000000000..03d3f36f9d --- /dev/null +++ b/boards/samr34-xpro/board.c @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2019 Mesotic SAS + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_samr34-xpro + * @{ + * + * @file board.c + * @brief Board specific implementations for the Microchip + * SAM R34 Xplained Pro board + * + * @author Dylan Laduranty + * + * @} + */ + +#include + +#include "board.h" +#include "cpu.h" +#include "periph/gpio.h" + +#ifdef MODULE_SX127X +#include "sx127x_params.h" +#endif + +void led_init(void); + +void board_init(void) +{ + /* initialize the CPU */ + cpu_init(); + + /* initialize the boards LEDs */ + led_init(); + + /* initialize board specific pins for LoRa */ +#ifdef MODULE_SX127X + gpio_init(TXCO_PWR_PIN, GPIO_OUT); + gpio_set(TXCO_PWR_PIN); + gpio_init(TX_OUTPUT_SEL_PIN, GPIO_OUT); + gpio_write(TX_OUTPUT_SEL_PIN, !SX127X_PARAM_PASELECT); +#endif /* USEMODULE_SX127X */ +} + + +/** + * @brief Initialize the boards on-board LED + */ +void led_init(void) +{ + gpio_init(LED0_PIN, GPIO_OUT); + gpio_set(LED0_PIN); /* gpio is inverted => clear */ + gpio_init(LED1_PIN, GPIO_OUT); + gpio_set(LED1_PIN); /* gpio is inverted => clear */ +} diff --git a/boards/samr34-xpro/include/board.h b/boards/samr34-xpro/include/board.h new file mode 100644 index 0000000000..fe8f5e9b4c --- /dev/null +++ b/boards/samr34-xpro/include/board.h @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2019 Mesotic SAS + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @defgroup boards_samr34-xpro Microchip SAM R34 Xplained Pro + * @ingroup boards + * @brief Support for the Microchip SAM R34 Xplained Pro board. + * @{ + * + * @file + * @brief Board specific definitions for the Microchip SAM R34 + * Xplained Pro board. + * + * @author Dylan Laduranty + */ + +#ifndef BOARD_H +#define BOARD_H + +#include "cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Semtech SX1276 configuration + * @{ + */ +#define SX127X_PARAM_SPI (SPI_DEV(0)) +#define SX127X_PARAM_SPI_NSS GPIO_PIN(1, 31) /* D10 */ +#define SX127X_PARAM_RESET GPIO_PIN(1, 15) /* A0 */ +#define SX127X_PARAM_DIO0 GPIO_PIN(1, 16) /* D2 */ +#define SX127X_PARAM_DIO1 GPIO_PIN(0, 11) /* D3 */ +#define SX127X_PARAM_DIO2 GPIO_PIN(0, 12) /* D4 */ +#define SX127X_PARAM_DIO3 GPIO_PIN(1, 17) /* D5 */ +#define SX127X_PARAM_PASELECT (SX127X_PA_RFO) +/** @}*/ + +/** + * @name Board specific configuration + * @{ + */ +#define TXCO_PWR_PIN GPIO_PIN(PA, 9) +#define TX_OUTPUT_SEL_PIN GPIO_PIN(PA, 13) +/** @}*/ + +/** + * @name LED pin definitions and handlers + * @{ + */ +#define LED_PORT PORT->Group[0] + +#define LED0_PIN GPIO_PIN(PA, 18) +#define LED0_MASK (1 << 18) +#define LED0_ON (LED_PORT.OUTCLR.reg = LED0_MASK) +#define LED0_OFF (LED_PORT.OUTSET.reg = LED0_MASK) +#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK) + +#define LED1_PIN GPIO_PIN(PA, 19) +#define LED1_MASK (1 << 19) +#define LED1_ON (LED_PORT.OUTCLR.reg = LED1_MASK) +#define LED1_OFF (LED_PORT.OUTSET.reg = LED1_MASK) +#define LED1_TOGGLE (LED_PORT.OUTTGL.reg = LED1_MASK) +/** @} */ + +/** + * @name BTN0 (SW0 Button) pin definitions + * @{ + */ +#define BTN0_PORT PORT->Group[0] +#define BTN0_PIN GPIO_PIN(PA, 28) +#define BTN0_MODE GPIO_IN_PU +/** @} */ + +/** + * @brief Initialize board specific hardware, including clock, LEDs and std-IO + */ +void board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/samr34-xpro/include/gpio_params.h b/boards/samr34-xpro/include/gpio_params.h new file mode 100644 index 0000000000..dd69c28ecf --- /dev/null +++ b/boards/samr34-xpro/include/gpio_params.h @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2019 Mesotic SAS + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_samr34-xpro + * @{ + * + * @file + * @brief Board specific configuration of direct mapped GPIOs + * + * @author Dylan Laduranty + */ + +#ifndef GPIO_PARAMS_H +#define GPIO_PARAMS_H + +#include "board.h" +#include "saul/periph.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief GPIO pin configuration + */ +static const saul_gpio_params_t saul_gpio_params[] = +{ + { + .name = "LED(green)", + .pin = LED0_PIN, + .mode = GPIO_OUT, + .flags = SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR, + }, + { + .name = "LED(orange)", + .pin = LED1_PIN, + .mode = GPIO_OUT, + .flags = SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR, + }, + { + .name = "Button(SW0)", + .pin = BTN0_PIN, + .mode = BTN0_MODE, + .flags = SAUL_GPIO_INVERTED, + }, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* GPIO_PARAMS_H */ +/** @} */ diff --git a/boards/samr34-xpro/include/periph_conf.h b/boards/samr34-xpro/include/periph_conf.h new file mode 100644 index 0000000000..180a8b09a1 --- /dev/null +++ b/boards/samr34-xpro/include/periph_conf.h @@ -0,0 +1,164 @@ +/* + * Copyright (C) 2019 Mesotic SAS + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_samr34-xpro + * @{ + * + * @file + * @brief Peripheral MCU configuration for the Microchip SAM R34 + * Xplained Pro board. + * + * @author Dylan Laduranty + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief GCLK reference speed + */ +#define CLOCK_CORECLOCK (16000000U) + +/** + * @name Timer peripheral configuration + * @{ + */ +static const tc32_conf_t timer_config[] = { + { /* Timer 0 - System Clock */ + .dev = TC0, + .irq = TC0_IRQn, + .mclk = &MCLK->APBCMASK.reg, + .mclk_mask = MCLK_APBCMASK_TC0 | MCLK_APBCMASK_TC1, + .gclk_id = TC0_GCLK_ID, + .gclk_src = GCLK_PCHCTRL_GEN(0), + .prescaler = TC_CTRLA_PRESCALER(4), + .flags = TC_CTRLA_MODE_COUNT32, + } +}; + +/* Timer 0 configuration */ +#define TIMER_0_CHANNELS 2 +#define TIMER_0_ISR isr_tc0 +#define TIMER_NUMOF (sizeof(timer_config)/sizeof(timer_config[0])) +/** @} */ + + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { /* Virtual COM Port */ + .dev = &SERCOM0->USART, + .rx_pin = GPIO_PIN(PA, 5), + .tx_pin = GPIO_PIN(PA, 4), + .mux = GPIO_MUX_D, + .rx_pad = UART_PAD_RX_1, + .tx_pad = UART_PAD_TX_0, + .flags = UART_FLAG_NONE, + .gclk_src = GCLK_PCHCTRL_GEN_GCLK0 + } +}; + +/* interrupt function name mapping */ +#define UART_0_ISR isr_sercom0 + +#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +static const spi_conf_t spi_config[] = { + { + .dev = &(SERCOM4->SPI), + .miso_pin = GPIO_PIN(PC, 19), + .mosi_pin = GPIO_PIN(PB, 30), + .clk_pin = GPIO_PIN(PC, 18), + .miso_mux = GPIO_MUX_F, + .mosi_mux = GPIO_MUX_F, + .clk_mux = GPIO_MUX_F, + .miso_pad = SPI_PAD_MISO_0, + .mosi_pad = SPI_PAD_MOSI_2_SCK_3 + } +}; + +#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) +/** @} */ + +/** + * @name I2C configuration + * @{ + */ +static const i2c_conf_t i2c_config[] = { + { + .dev = &(SERCOM1->I2CM), + .speed = I2C_SPEED_NORMAL, + .scl_pin = GPIO_PIN(PA, 17), + .sda_pin = GPIO_PIN(PA, 16), + .mux = GPIO_MUX_C, + .gclk_src = GCLK_PCHCTRL_GEN_GCLK0, + .flags = I2C_FLAG_NONE + } +}; +#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0])) +/** @} */ + +/** + * @name RTC configuration + * @{ + */ +#define RTC_NUMOF (1) +#define EXTERNAL_OSC32_SOURCE 1 +#define INTERNAL_OSC32_SOURCE 0 +#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0 +/** @} */ + +/** + * @name RTT configuration + * @{ + */ +#define RTT_FREQUENCY (32768U) +#define RTT_MAX_VALUE (0xffffffffU) +#define RTT_NUMOF (1) +/** @} */ + +/** + * @name ADC Configuration + * @{ + */ +#define ADC_NUMOF (2U) + +/* ADC 0 Default values */ +#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */ +#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV256 + +static const adc_conf_chan_t adc_channels[] = { + /* port, pin, muxpos */ + {GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN6)}, + {GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN7)} +}; + +#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u) +#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2 +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */