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Merge pull request #6711 from haukepetersen/opt_doc_nrf24

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drivers/nrf24l01: removed doxgen warnings
This commit is contained in:
Peter Kietzmann 2017-03-13 23:39:48 +01:00 committed by GitHub
commit db6bf02168
2 changed files with 74 additions and 28 deletions
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1
doc/doxygen/riot.doxyfile
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@ -826,7 +826,6 @@ EXCLUDE_PATTERNS = */board/*/tools/* \
*/cpu/native/osx-libc-extra \
*/cpu/x86/include/* \
*/drivers/kw2xrf/include/overwrites.h \
*/drivers/nrf24l01p/include/nrf24l01p_settings.h \
*/pkg/*/*/* \
*/pkg/tlsf/patch.txt \
*/sys/include/embUnit/* \

101
drivers/nrf24l01p/include/nrf24l01p_settings.h
View File

@ -26,13 +26,22 @@
extern "C" {
#endif
/**
* @name Default configuration parameters
* @{
*/
#define INITIAL_ADDRESS_WIDTH 5
#define NRF24L01P_MAX_DATA_LENGTH 32
#ifndef INITIAL_RF_CHANNEL
#define INITIAL_RF_CHANNEL 5
#endif
#define INITIAL_RX_POWER_0dB 0
/** @} */
/**
* @name Timing parameters
* @{
*/
#define DELAY_CS_TOGGLE_US 2
#define DELAY_AFTER_FUNC_US 2
#define DELAY_CE_HIGH_US (20)
@ -44,9 +53,13 @@ extern "C" {
* Compare nrf24l01+ pruduct specification p.42. It is computed just
* for this setup
*/
#define DELAY_DATA_ON_AIR (1300)
#define DELAY_DATA_ON_AIR (1300)
/** @} */
/**
* @name Command definitions
* @{
*/
#define CMD_R_REGISTER 0x00
#define CMD_W_REGISTER 0x20
#define CMD_R_RX_PAYLOAD 0x61
@ -60,10 +73,14 @@ extern "C" {
#define CMD_NOP 0xff
#define REGISTER_MASK 0x1F
/** @} */
#define REG_CONFIG 0x00 /* config */
#define REG_EN_AA 0x01 /* enhanced shockburst */
/**
* @name Register address definitions
* @{
*/
#define REG_CONFIG 0x00
#define REG_EN_AA 0x01
#define REG_EN_RXADDR 0x02
#define REG_SETUP_AW 0x03
#define REG_SETUP_RETR 0x04
@ -88,50 +105,80 @@ extern "C" {
#define REG_FIFO_STATUS 0x17
#define REG_DYNPD 0x1c
#define REG_FEATURE 0x1d
/** @} */
/* Bits in EN_AA register */
#define ENAA_P0 0x01
#define ENAA_P1 0x02
#define ENAA_P2 0x04
#define ENAA_P3 0x08
#define ENAA_P4 0x10
#define ENAA_P5 0x20
/**
* @name EN_AA register bitmaps
* @{
*/
#define ENAA_P0 0x01
#define ENAA_P1 0x02
#define ENAA_P2 0x04
#define ENAA_P3 0x08
#define ENAA_P4 0x10
#define ENAA_P5 0x20
/** @} */
/* Bits in CONFIG register */
#define MASK_RX_DR 0x40
#define MASK_TX_DS 0x20
#define MASK_MAX_RT 0x10
#define EN_CRC 0x08
#define CRCO 0x04
#define PWR_UP 0x02
#define PRIM_RX 0x01
/**
* @name CONFIG register bitmaps
*/
#define MASK_RX_DR 0x40
#define MASK_TX_DS 0x20
#define MASK_MAX_RT 0x10
#define EN_CRC 0x08
#define CRCO 0x04
#define PWR_UP 0x02
#define PRIM_RX 0x01
/** @} */
/* Bits in STATUS register */
#define RX_DR 0x40
#define TX_DS 0x20
#define MAX_RT 0x10
#define RX_P_NO 0x0e
#define TX_FULL 0x01
#define ALL_INT_MASK 0x70
/**
* @name STATUS register bitmaps
* @{
*/
#define RX_DR 0x40
#define TX_DS 0x20
#define MAX_RT 0x10
#define RX_P_NO 0x0e
#define TX_FULL 0x01
#define ALL_INT_MASK 0x70
/** @} */
/**
* @name RF_SETUP register bitmaps
* @{
*/
#define RF_SETUP_CONT_WAVE (1 << 7)
#define RF_SETUP_RF_DR_LOW (1 << 5)
#define RF_SETUP_PLL_LOCK (1 << 4)
#define RF_SETUP_RF_DR_HIGH (1 << 3)
#define RF_SETUP_RF_PWR (3 << 1)
/** @} */
/**
* @name Channel mask for the RF_CH register
*/
#define RF_CH_MASK 0x7f
/**
* @name DYNPD register bitmaps
* @{
*/
#define DYNPD_DPL_P5 (1 << 5)
#define DYNPD_DPL_P4 (1 << 4)
#define DYNPD_DPL_P3 (1 << 3)
#define DYNPD_DPL_P2 (1 << 2)
#define DYNPD_DPL_P1 (1 << 1)
#define DYNPD_DPL_P0 (1 << 0)
/** @} */
/**
* @name FEATURE register bitmaps
* @{
*/
#define FEATURE_EN_DPL (1 << 2)
#define FEATURE_EN_ACK_PAY (1 << 1)
#define FEATURE_EN_DYN_ACK (1 << 0)
/** @} */
#ifdef __cplusplus
}