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cpu/stm32f0: reworked ADC driver
This commit is contained in:
Hauke Petersen
parent
e5bae2776d
commit
da80af479c
@ -77,6 +77,29 @@ typedef enum {
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GPIO_AF3, /**< use alternate function 3 */
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} gpio_af_t;
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/**
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* @brief Override ADC resolution values
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = (0x3 << 3), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = (0x2 << 3), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = (0x1 << 3), /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = (0x0 << 3), /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = (0xfe), /**< not applicable */
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ADC_RES_16BIT = (0xff) /**< not applicable */
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} adc_res_t;
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/** @} */
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/**
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* @brief ADC line configuration values
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*/
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typedef struct {
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gpio_t pin; /**< pin to use */
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uint8_t chan; /**< internal channel the pin is connected to */
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} adc_conf_t;
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/**
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* @brief Configure the alternate function for the given pin
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*
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@ -1,9 +1,9 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2014-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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@ -18,164 +18,90 @@
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* @}
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*/
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#include <stdint.h>
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#include <string.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "periph/adc.h"
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#include "periph_conf.h"
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/* guard in case that no ADC device is defined */
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#if ADC_NUMOF
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/**
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* @brief Maximum allowed ADC clock speed
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*/
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#define MAX_ADC_SPEED (12000000U)
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typedef struct {
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uint8_t precision;
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} adc_config_t;
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adc_config_t config[ADC_NUMOF];
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int adc_init(adc_t dev, adc_precision_t precision)
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{
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ADC_TypeDef *adc = 0;
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adc_poweron(dev);
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switch (dev) {
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#if ADC_0_EN
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case ADC_0:
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adc = ADC_0_DEV;
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ADC_0_PORT_CLKEN();
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ADC_0_PORT->MODER |= ((3 << ADC_0_CH0_PIN) | (3 << ADC_0_CH1_PIN) |
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(3 << ADC_0_CH2_PIN) | (3 << ADC_0_CH3_PIN) |
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(3 << ADC_0_CH4_PIN) | (3 << ADC_0_CH5_PIN));
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break;
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/**
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* @brief Load the ADC configuration
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* @{
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*/
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#ifdef ADC_CONFIG
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static const adc_conf_t adc_config[] = ADC_CONFIG;
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#else
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static const adc_conf_t adc_config[] = {};
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#endif
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default:
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return -1;
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/**
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* @brief Allocate locks for all three available ADC device
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*
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* All STM32F0 CPUs we support so far only come with a single ADC device.
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*/
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static mutex_t lock = MUTEX_INIT;
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static inline void prep(void)
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{
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mutex_lock(&lock);
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RCC->APB2ENR |= RCC_APB2ENR_ADCEN;
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}
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static inline void done(void)
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{
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RCC->APB2ENR &= ~(RCC_APB2ENR_ADCEN);
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mutex_unlock(&lock);
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}
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int adc_init(adc_t line)
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{
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/* make sure the given line is valid */
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if (line >= ADC_NUMOF) {
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return -1;
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}
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/* reset control registers */
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adc->CR = 0;
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adc->CFGR1 = 0;
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adc->CFGR2 = 0;
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/* set resolution */
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config[dev].precision = (6 + (2 * precision));
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switch (precision) {
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case ADC_RES_6BIT:
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adc->CFGR1 |= ADC_CFGR1_RES_0 | ADC_CFGR1_RES_1;
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break;
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case ADC_RES_8BIT:
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adc->CFGR1 |= ADC_CFGR1_RES_1;
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break;
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case ADC_RES_10BIT:
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adc->CFGR1 |= ADC_CFGR1_RES_0;
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break;
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case ADC_RES_12BIT:
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break;
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case ADC_RES_14BIT:
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case ADC_RES_16BIT:
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adc_poweroff(dev);
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return -1;
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}
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/* configure sampling time to 41.5 cycles */
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adc->SMPR = 4;
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/* enable the ADC module */
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adc->CR = ADC_CR_ADEN;
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/* lock and power on the device */
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prep();
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/*configure the pin */
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gpio_init_analog(adc_config[line].pin);
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/* reset configuration */
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ADC1->CFGR2 = 0;
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/* enable device */
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ADC1->CR = ADC_CR_ADEN;
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/* configure sampling time to save value */
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ADC1->SMPR = 0x3; /* 28.5 ADC clock cycles */
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/* power off an release device for now */
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done();
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return 0;
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}
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int adc_sample(adc_t dev, int channel)
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int adc_sample(adc_t line, adc_res_t res)
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{
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ADC_TypeDef *adc = 0;
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int sample;
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switch (dev) {
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#if ADC_0_EN
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case ADC_0:
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adc = ADC_0_DEV;
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switch (channel) {
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case 0:
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adc->CHSELR = (1 << ADC_0_CH0);
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break;
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case 1:
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adc->CHSELR = (1 << ADC_0_CH1);
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break;
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case 2:
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adc->CHSELR = (1 << ADC_0_CH2);
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break;
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case 3:
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adc->CHSELR = (1 << ADC_0_CH3);
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break;
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case 4:
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adc->CHSELR = (1 << ADC_0_CH4);
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break;
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case 5:
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adc->CHSELR = (1 << ADC_0_CH5);
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break;
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default:
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return -1;
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}
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break;
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#endif
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default:
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return -1;
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/* check if resolution is applicable */
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if (res > 0xf0) {
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return -1;
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}
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/* start single conversion */
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adc->CR |= ADC_CR_ADSTART;
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/* wait until conversion is complete */
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while (!(adc->ISR & ADC_ISR_EOC)) {}
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/* read and return result */
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return (int)adc->DR;
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}
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/* lock and power on the ADC device */
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prep();
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void adc_poweron(adc_t dev)
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{
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switch (dev) {
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#if ADC_0_EN
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case ADC_0:
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ADC_0_CLKEN();
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break;
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#endif
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#if ADC_1_EN
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case ADC_1:
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ADC_1_CLKEN();
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break;
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#endif
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}
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}
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/* set resolution and channel */
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ADC1->CFGR1 = res;
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ADC1->CHSELR = (1 << adc_config[line].chan);
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/* start conversion and wait for results */
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ADC1->CR |= ADC_CR_ADSTART;
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while (!(ADC1->ISR & ADC_ISR_EOC)) {}
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/* read result */
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sample = (int)ADC1->DR;
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void adc_poweroff(adc_t dev)
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{
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switch (dev) {
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#if ADC_0_EN
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case ADC_0:
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ADC_0_CLKDIS();
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break;
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#endif
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#if ADC_1_EN
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case ADC_1:
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ADC_1_CLKDIS();
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break;
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#endif
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}
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}
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/* unlock and power off device again */
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done();
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int adc_map(adc_t dev, int value, int min, int max)
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{
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return 0;
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return sample;
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}
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float adc_mapf(adc_t dev, int value, float min, float max)
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{
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return 0.0;
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}
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#endif /* ADC_NUMOF */
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