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board: drop support for PTTU platform

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This commit is contained in:
Oleg Hahm 2017-01-16 22:41:38 +01:00
parent 274d77e6a5
commit d834d7769e
12 changed files with 0 additions and 484 deletions
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5
boards/pttu/Makefile
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MODULE = board
DIRS = $(RIOTBOARD)/msba2-common
include $(RIOTBASE)/Makefile.base

1
boards/pttu/Makefile.dep
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include $(RIOTBOARD)/msba2-common/Makefile.dep

11
boards/pttu/Makefile.features
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# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# Various other features (if any)
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = arm7

3
boards/pttu/Makefile.include
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USEMODULE += msba2-common
include $(RIOTBOARD)/msba2-common/Makefile.include

179
boards/pttu/board_init.c
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/*
* Copyright (C) 2013 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_pttu
* @{
*/
/**
* @file
* @brief PTTU board initialization
*
* @author Heiko Will
* @author Kaspar Schleiser
*
*/
#include "board.h"
#include "msba2_common.h"
#include "VIC.h"
#include "cpu.h"
#define CL_CPU_DIV 4
/*---------------------------------------------------------------------------*/
void init_clks1(void)
{
/* Disconnect PLL */
PLLCON &= ~0x0002;
pllfeed();
while (PLLSTAT & BIT25) {} /* wait until PLL is disconnected before disabling - deadlock otherwise */
/* Disable PLL */
PLLCON &= ~0x0001;
pllfeed();
while (PLLSTAT & BIT24) {} /* wait until PLL is disabled */
SCS |= 0x20; /* Enable main OSC */
while( !(SCS & 0x40) ) {} /* Wait until main OSC is usable */
/* select main OSC, 16MHz, as the PLL clock source */
CLKSRCSEL = 0x0001;
/* Setting Multiplier and Divider values */
PLLCFG = 0x0008; /* M=9 N=1 Fcco = 288 MHz */
pllfeed();
/* Enabling the PLL */
PLLCON = 0x0001;
pllfeed();
/* Set clock divider to 4 (value+1) */
CCLKCFG = CL_CPU_DIV - 1; /* Fcpu = 72 MHz */
#if USE_USB
USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */
#endif
}
void bl_init_ports(void)
{
gpio_init_ports();
/* UART0 */
PINSEL0 |= BIT4 + BIT6; /* RxD0 and TxD0 */
PINSEL0 &= ~(BIT5 + BIT7);
/* Turn Board on */
PINMODE0 |= BIT1;
FIO0DIR |= BIT27;
FIO0CLR = BIT27;
/* 5V*/
FIO1DIR |= BIT28; /* Synch */
FIO1SET = BIT28; /* No Powersave */
FIO1DIR |= BIT27; /* 5V off */
FIO1CLR = BIT27;
/* Disable Resistors on Buttons */
PINMODE4 |= BIT9 + BIT11;
/* Disable Resistors on LED - and Ports to output*/
PINMODE7 |= BIT19 + BIT21;
PINMODE2 |= BIT1;
FIO1DIR |= BIT0;
FIO3DIR |= BIT25 + BIT26;
FIO1SET = BIT0;
FIO3SET = BIT25 + BIT26;
/* Config and Disable PA */
FIO1DIR |= BIT25 + BIT26 + BIT22;
FIO1SET = BIT26;
FIO1CLR = BIT25;
FIO1CLR = BIT22; /* PA /Shutdown */
FIO0DIR |= BIT26; /* ** Important: First put this Port as DA 2.0V and then turn on PA!! */
FIO0SET = BIT26; /* ** */
/* Configure GPS */
PINMODE3 |= BIT3 + BIT7; /* No Pullup on 1.17 & 1.19 */
PINMODE9 |= BIT27 + BIT25; /* No Pullup for Uart */
FIO1DIR |= BIT17;
FIO1CLR = BIT17; /* Turn off GPS */
FIO1DIR |= BIT19;
FIO1CLR = BIT19; /* Hold in Reset */
PINSEL9 |= BIT24 + BIT25 + BIT26 + BIT27; /* 4.28 & 4.29 as Uart3 */
/* Nanotron */
FIO2DIR &= ~BIT8; /* nanotron uC IRQ as input */
FIO1DIR |= BIT15; /* nanotron power on reset */
FIO1DIR &= ~BIT14; /* nanotron uC RESET as input */
FIO1DIR &= ~BIT10; /* nanotron uC Vcc as input */
FIO1DIR |= BIT9; /* nanotron ENABLE as output */
FIO1DIR &= ~BIT4; /* nanotron Rx/Tx as input */
FIO1CLR = BIT15;
FIO1CLR = BIT9; /* Enable power */
PINMODE1 |= BIT1; /* No Pullup for CS */
FIO0DIR |= BIT16; /* CS as output */
FIO0SET = BIT16; /* drive cs inactive */
FIO0DIR |= BIT18 + BIT15; /* SPi Output */
/* RFID */
FIO1DIR |= BIT1; /* RFID Power */
FIO1CLR = BIT1; /* */
FIO0DIR |= BIT1; /* RFID Reset */
FIO0SET = BIT1; /* Hold in Reset */
FIO0DIR &= ~BIT10; /* LED as INPUT */
FIO0DIR &= ~BIT11; /* DATA as INPUT */
PINMODE0 |= BIT19 + BIT21; /* No Pullups */
/* LTC4150 ARM */
FIO0DIR |= BIT5;
FIO0CLR = BIT5;
/* LTC4150 System */
FIO0DIR |= BIT24;
FIO0CLR = BIT24;
/* Battery Voltage (AD) */
PINMODE1 |= BIT19;
PINSEL1 &= ~BIT19;
PINSEL1 |= BIT18;
/*cc1100 */
FIO0DIR |= BIT6 + BIT7 + BIT9;
FIO0SET = BIT6;
FIO0SET = BIT7 + BIT9;
/*SD */
FIO2DIR |= BIT12 + BIT13 + BIT11;
FIO0DIR |= BIT20 + BIT22 + BIT21;
/*Tetra */
FIO2DIR |= BIT0 + BIT7;
/* No Pullups on any port */
int nopullup = BIT1 + BIT3 + BIT5 + BIT7 + BIT9 + BIT11 + BIT13 + BIT15 + BIT17 + BIT19 + BIT21 + BIT23 + BIT25 + BIT27 + BIT29 + BIT31;
PINMODE0 = nopullup - BIT13 - BIT15 - BIT17 - BIT19;
PINMODE1 = BIT1 + BIT3 + BIT5 + BIT7 + BIT9 + BIT11 + BIT13 + BIT15 + BIT17 + BIT19 + BIT21;
PINMODE2 = nopullup;
PINMODE3 = nopullup;
PINMODE4 = nopullup;
PINMODE5 = nopullup;
PINMODE6 = nopullup;
PINMODE7 = nopullup;
PINMODE8 = nopullup;
PINMODE9 = nopullup;
}
/** @} */

58
boards/pttu/include/board.h
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_pttu PTTU
* @ingroup boards
* @brief Support for the PTTU board
* @{
*
* @file
* @brief Basic definitions for the PTTU board
*
* @author Kaspar Schleiser <kaspar@schleiser.de>
*/
#ifndef BOARD_H_
#define BOARD_H_
#include <stdint.h>
#include "lpc2387.h"
#include "cpu_conf.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief VICIntEnClear Alias for compatibility
*/
#define VICIntEnClear VICIntEnClr
/**
* @brief Clock initialization part one
*/
void init_clks1(void);
/**
* @brief Clock initialization part two
*/
void init_clks2(void);
/**
* @brief Jump to clock initialization code
*/
void bl_init_clks(void);
#ifdef __cplusplus
}
#endif
/** @} */
#endif /* BOARD_H_ */

86
boards/pttu/include/periph_conf.h
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/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup boards_pttu
* @{
*
* @file
* @brief Peripheral configuration for the PTTU
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#include "lpc2387.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Clock configuration
* @{
*/
#define CLOCK_CORECLOCK (72000000U) /* the msba2 runs with 72MHz */
#define CLOCK_PCLK (CLOCK_CORECLOCK)
/** @} */
/**
* @brief Timer configuration, select a number from 1 to 4
* @{
*/
#define TIMER_NUMOF (1U)
/** @} */
/**
* @brief PWM device and pinout configuration
*/
#define PWM_NUMOF (0) /* disable PWM for now as no pins are specified */
#define PWM_0_EN (0)
/* PWM_0 device configuration */
#define PWM_0_CH0 (3) /* TODO: adjust pins for the PTTU */
#define PWM_0_CH0_MR PWM1MR3
#define PWM_0_CH1 (4)
#define PWM_0_CH1_MR PWM1MR4
#define PWM_0_CH2 (5)
#define PWM_0_CH2_MR PWM1MR5
/* PWM_0 pin configuration */
#define PWM_0_PORT PINSEL4
#define PWM_0_CH0_PIN (2)
#define PWM_0_CH1_PIN (3)
#define PWM_0_CH2_PIN (4)
#define PWM_0_FUNC (1)
/**
* @brief Real Time Clock configuration
*/
#define RTC_NUMOF (1)
/**
* @brief uart configuration
*/
#define UART_NUMOF (1)
#define UART_0_EN (1)
/**
* @brief SPI configuration
*/
#define SPI_NUMOF (1)
#define SPI_0_EN (1)
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H_ */
/** @} */

14
boards/pttu/tools/jtag.txt
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compile openocd release v0.1:
[extract to somewhere]
./configure --prefix=CHANGEMEtowhatever --enable-ft2232_libftdi
make
make install
to flash run from within board/pttu/tools:
./openocd-pttu.sh olimex-usb-jtag-tiny-a "mt_flash CHANGEME/absolute/path/to/hexfile/pttu.hex;shutdown"
to debug, first start the following from within board/pttu/tools:
./openocd-pttu.sh olimex-usb-jtag-tiny-a
then just run "jam debug". this will flash bin/pttu.hex, run it and stop at the bootloader.

8
boards/pttu/tools/olimex-arm-usb-ocd.cfg
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#
set CPUTAPID 0x4f1f0f0f
jtag_speed 100
source [find interface/olimex-arm-usb-ocd.cfg]
#source [find target/lpc2148.cfg]
source lpc2378.cfg

75
boards/pttu/tools/openocd-pttu.cfg
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######
# parts taken from Martin Thomas
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
#
set CPUTAPID 0x4f1f0f0f
jtag_speed 100
source [find cpu/lpc2387/tools/openocd-lpc2387.cfg]
fast disable
#
# scipts/macros/user commands - this is TCL (variant JIM):
#
proc mt_internal_rc {} {
jtag_khz 100
reset run
sleep 100
reset
halt
wait_halt 2
# PLL disconnect PLLCON
mww 0xE01FC080 0x01
mww 0xE01FC08C 0xAA
mww 0xE01FC08C 0x55
# PLL disable PLLCON
mww 0xE01FC080 0x00
mww 0xE01FC08C 0xAA
mww 0xE01FC08C 0x55
# no prescaler CCLKCFG
mww 0xE01FC104 0x00
# internal RC CLKSRCSEL
mww 0xE01FC10C 0x00
#### main oscil. CLKSRCSEL
#### mww 0xE01FC10C 0x01
# remap to internal flash
mww 0xE01FC040 0x01
sleep 100
jtag_khz 500
flash probe 0
}
proc mt_flash_bin {IMGFILE OFFSET} {
mt_internal_rc
flash write_image erase $IMGFILE $OFFSET
sleep 100
verify_image $IMGFILE $OFFSET
sleep 100
}
proc mt_flash_v {IMGFILE} {
mt_internal_rc
flash write_image erase $IMGFILE
sleep 100
verify_image $IMGFILE
sleep 100
}
proc mt_flash {IMGFILE} {
mt_internal_rc
flash write_image erase $IMGFILE
}
flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 4000 calc_checksum
arm7_9 dcc_downloads enable
gdb_flash_program enable
init
fast enable
jtag_khz 500
debug_level 1

30
boards/pttu/tools/openocd-pttu.sh
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#/usr/bin/env bash
if [ $# -le 0 ]; then
echo "usage: $0 [openocd interface name] [openocd args]" >&2
echo " common interfaces: olimex-arm-usb-ocd olimex-jtag-tiny olimex-jtag-tiny-a"
echo ""
echo "using default olimex-jtag-tiny-a"
INTERFACE=olimex-jtag-tiny-a
else
INTERFACE=$1
shift
fi
if [ $# -ge 1 ]; then
COMMAND=$@
else
COMMAND="debug_level 1"
fi
if [ "${OS}" = "Windows_NT" ]; then
WINDOWS=1
fi
if [ "x${WINDOWS}x" = "xx" ]; then
xterm -e "openocd -s ../../.. -f interface/${INTERFACE}.cfg -f board/pttu/tools/openocd-pttu.cfg -c \"${COMMAND}\"|| read" &
else
echo ${COMMAND}
#cmd /C start "OpenOCD PTTU using ${INTERFACE}"
openocd-ftd2xx.exe -s ../../.. -f interface/${INTERFACE}.cfg -f board/pttu/tools/openocd-pttu.cfg -c "${COMMAND}"
fi

14
boards/pttu/tools/pttu_debug.gdb
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#winheight regs 11
set history save on
set history size 1000
target remote localhost:3333
monitor mt_internal_rc
load
compare-sections
monitor soft_reset_halt
set mem inaccessible-by-default off
monitor debug_level 0
break bootloader
continue
d b 1